Changeset 96e0748d in mainline for boot/arch/mips32/loader/boot.S
- Timestamp:
- 2009-02-17T22:47:27Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- f89979b
- Parents:
- e662a5f
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/mips32/loader/boot.S
re662a5f r96e0748d 28 28 29 29 #include "regname.h" 30 31 #define INITIAL_STACK 0x80040000 32 #define MSIM_DORDER_ADDRESS 0x90000004 30 #include "main.h" 33 31 34 32 .set noat … … 41 39 start: 42 40 41 /* Setup CPU map (on msim this code 42 is executed in parallel on all CPUs, 43 but it not an issue) */ 44 la $a0, CPUMAP 45 46 sw $zero, 0($a0) 47 sw $zero, 4($a0) 48 sw $zero, 8($a0) 49 sw $zero, 12($a0) 50 51 sw $zero, 16($a0) 52 sw $zero, 20($a0) 53 sw $zero, 24($a0) 54 sw $zero, 28($a0) 55 56 sw $zero, 32($a0) 57 sw $zero, 36($a0) 58 sw $zero, 40($a0) 59 sw $zero, 44($a0) 60 61 sw $zero, 48($a0) 62 sw $zero, 52($a0) 63 sw $zero, 56($a0) 64 sw $zero, 60($a0) 65 66 sw $zero, 64($a0) 67 sw $zero, 68($a0) 68 sw $zero, 72($a0) 69 sw $zero, 76($a0) 70 71 sw $zero, 80($a0) 72 sw $zero, 84($a0) 73 sw $zero, 88($a0) 74 sw $zero, 92($a0) 75 76 sw $zero, 96($a0) 77 sw $zero, 100($a0) 78 sw $zero, 104($a0) 79 sw $zero, 108($a0) 80 81 sw $zero, 112($a0) 82 sw $zero, 116($a0) 83 sw $zero, 120($a0) 84 sw $zero, 124($a0) 85 86 lui $a1, 1 87 43 88 #ifdef MACHINE_msim 89 44 90 /* Read dorder value */ 45 91 la $k0, MSIM_DORDER_ADDRESS 46 lw $k 0, ($k0)92 lw $k1, ($k0) 47 93 48 94 /* If we are not running on BSP 49 end in an infinite loop */50 beq $k 0, $zero, bsp95 then end in an infinite loop */ 96 beq $k1, $zero, bsp 51 97 nop 98 99 /* Record CPU presence */ 100 sll $a2, $k1, 2 101 addu $a2, $a2, $a0 102 sw $a1, ($a2) 52 103 53 104 loop: … … 58 109 59 110 bsp: 111 /* Record CPU presence */ 112 sw $a1, ($a0) 113 60 114 /* Setup initial stack */ 61 lui $sp, INITIAL_STACK >> 16 62 ori $sp, $sp, INITIAL_STACK & 0xffff 115 la $sp, INITIAL_STACK 63 116 64 117 j bootstrap
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