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Changeset 95c4776 in mainline


Ignore:
Timestamp:
2010-02-21T19:02:16Z (12 years ago)
Author:
Pavel Rimsky <pavel@…>
Branches:
lfn, master
Children:
af56e9b
Parents:
c2efbb4
Message:

Merging SMP (unstable)

Files:
7 added
7 edited
2 moved

Legend:

Unmodified
Added
Removed
  • HelenOS.config

    rc2efbb4 r95c4776  
    344344! [PLATFORM=sparc64] CONFIG_VIRT_IDX_DCACHE (y/n)
    345345
     346% Simics SMP Hack
     347! [PROCESSOR=sun4v] CONFIG_SIMICS_SMP_HACK (y/n)
     348
    346349% Support for userspace debuggers
    347350! CONFIG_UDEBUG (y/n)
  • kernel/arch/sparc64/Makefile.inc

    rc2efbb4 r95c4776  
    9292        arch/$(KARCH)/src/drivers/sgcn.c \
    9393        arch/$(KARCH)/src/drivers/pci.c \
    94         arch/$(KARCH)/src/drivers/fhc.c
     94        arch/$(KARCH)/src/drivers/fhc.c \
     95        arch/$(KARCH)/src/trap/$(USARCH)/interrupt.c
    9596
    9697ifeq ($(USARCH),sun4u)
     
    112113ifeq ($(CONFIG_SMP),y)
    113114        ARCH_SOURCES += \
    114                 arch/$(KARCH)/src/smp/ipi.c \
    115                 arch/$(KARCH)/src/smp/smp.c
     115                arch/$(KARCH)/src/smp/$(USARCH)/smp.c \
     116                arch/$(KARCH)/src/smp/$(USARCH)/ipi.c
    116117endif
    117118
  • kernel/arch/sparc64/include/sun4v/cpu.h

    rc2efbb4 r95c4776  
    4646struct cpu;
    4747
    48 /*
    4948typedef struct {
    5049        uint64_t exec_unit_id;
     
    5251        uint64_t cpuids[MAX_CORE_STRANDS];
    5352        struct cpu *cpus[MAX_CORE_STRANDS];
     53        //cpu_t *cpus[MAX_CORE_STRANDS];
    5454        atomic_t nrdy;
    5555        SPINLOCK_DECLARE(proposed_nrdy_lock);
    5656} exec_unit_t;
    57 */
    5857
    5958typedef struct cpu_arch {
     
    6362                                             generated when the TICK register
    6463                                             matches this value. */
    65         //exec_unit_t *exec_unit;               /**< Physical core. */
    66         //unsigned long proposed_nrdy;  /**< Proposed No. of ready threads
    67         //                                   so that cores are equally balanced. */
     64        exec_unit_t *exec_unit;         /**< Physical core. */
     65        unsigned long proposed_nrdy;    /**< Proposed No. of ready threads
     66                                             so that cores are equally balanced. */
    6867} cpu_arch_t;
    6968
  • kernel/arch/sparc64/include/trap/interrupt.h

    rc2efbb4 r95c4776  
    3232/**
    3333 * @file
    34  * @brief This file contains interrupt vector trap handler.
     34 * @brief This file contains level N interrupt and inter-processor interrupt
     35 * trap handler.
    3536 */
    36 
    37 #ifndef KERN_sparc64_TRAP_INTERRUPT_H_
    38 #define KERN_sparc64_TRAP_INTERRUPT_H_
    39 
    40 #include <arch/trap/trap_table.h>
    41 #include <arch/stack.h>
    42 
    43 /* IMAP register bits */
    44 #define IGN_MASK        0x7c0
    45 #define INO_MASK        0x1f
    46 #define IMAP_V_MASK     (1ULL << 31)
    47 
    48 #define IGN_SHIFT       6
    49 
    50 
    51 /* Interrupt ASI registers. */
    52 #define ASI_INTR_W                      0x77
    53 #define ASI_INTR_DISPATCH_STATUS        0x48
    54 #define ASI_INTR_R                      0x7f
    55 #define ASI_INTR_RECEIVE                0x49
    56 
    57 /* VA's used with ASI_INTR_W register. */
    58 #if defined (US)
    59 #define ASI_UDB_INTR_W_DATA_0   0x40
    60 #define ASI_UDB_INTR_W_DATA_1   0x50
    61 #define ASI_UDB_INTR_W_DATA_2   0x60
    62 #elif defined (US3)
    63 #define VA_INTR_W_DATA_0        0x40
    64 #define VA_INTR_W_DATA_1        0x48
    65 #define VA_INTR_W_DATA_2        0x50
    66 #define VA_INTR_W_DATA_3        0x58
    67 #define VA_INTR_W_DATA_4        0x60
    68 #define VA_INTR_W_DATA_5        0x68
    69 #define VA_INTR_W_DATA_6        0x80
    70 #define VA_INTR_W_DATA_7        0x88
    71 #endif
    72 #define VA_INTR_W_DISPATCH      0x70
    73 
    74 /* VA's used with ASI_INTR_R register. */
    75 #if defined(US)
    76 #define ASI_UDB_INTR_R_DATA_0   0x40
    77 #define ASI_UDB_INTR_R_DATA_1   0x50
    78 #define ASI_UDB_INTR_R_DATA_2   0x60
    79 #elif defined (US3)
    80 #define VA_INTR_R_DATA_0        0x40
    81 #define VA_INTR_R_DATA_1        0x48
    82 #define VA_INTR_R_DATA_2        0x50
    83 #define VA_INTR_R_DATA_3        0x58
    84 #define VA_INTR_R_DATA_4        0x60
    85 #define VA_INTR_R_DATA_5        0x68
    86 #define VA_INTR_R_DATA_6        0x80
    87 #define VA_INTR_R_DATA_7        0x88
    88 #endif
    89 
    90 /* Shifts in the Interrupt Vector Dispatch virtual address. */
    91 #define INTR_VEC_DISPATCH_MID_SHIFT     14
    92 
    93 /* Bits in the Interrupt Dispatch Status register. */
    94 #define INTR_DISPATCH_STATUS_NACK       0x2
    95 #define INTR_DISPATCH_STATUS_BUSY       0x1
     37#ifndef KERN_sparc64_INTERRUPT_TRAP_H_
     38#define KERN_sparc64_INTERRUPT_TRAP_H_
    9639
    9740#define TT_INTERRUPT_LEVEL_1                    0x41
     
    11154#define TT_INTERRUPT_LEVEL_15                   0x4f
    11255
    113 #define TT_INTERRUPT_VECTOR_TRAP                0x60
     56#define INTERRUPT_LEVEL_N_HANDLER_SIZE          TRAP_TABLE_ENTRY_SIZE
    11457
    115 #define INTERRUPT_LEVEL_N_HANDLER_SIZE          TRAP_TABLE_ENTRY_SIZE
    116 #define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE      TRAP_TABLE_ENTRY_SIZE
     58/* IMAP register bits */
     59#define IGN_MASK        0x7c0
     60#define INO_MASK        0x1f
     61#define IMAP_V_MASK     (1ULL << 31)
     62
     63#define IGN_SHIFT       6
     64
    11765
    11866#ifdef __ASM__
     
    12169        PREEMPTIBLE_HANDLER exc_dispatch
    12270.endm
    123 
    124 .macro INTERRUPT_VECTOR_TRAP_HANDLER
    125         PREEMPTIBLE_HANDLER interrupt
    126 .endm
    127 #endif /* __ASM__ */
     71#endif
    12872
    12973#ifndef __ASM__
     
    13478#endif /* !def __ASM__ */
    13579
     80
     81#if defined (SUN4U)
     82#include <arch/trap/sun4u/interrupt.h>
     83#elif defined (SUN4V)
     84#include <arch/trap/sun4v/interrupt.h>
     85#endif
     86
    13687#endif
    13788
  • kernel/arch/sparc64/src/cpu/sun4v/cpu.c

    rc2efbb4 r95c4776  
    4141#include <arch/sun4v/md.h>
    4242#include <arch/sun4v/hypercall.h>
     43#include <arch/trap/sun4v/interrupt.h>
    4344
    4445//#include <arch/trap/sun4v/interrupt.h>
     
    7475               
    7576        tick_init();
    76         //MH - uncomment later
    77         //sun4v_ipi_init();
     77
     78        sun4v_ipi_init();
    7879}
    7980
  • kernel/arch/sparc64/src/smp/sun4u/ipi.c

    rc2efbb4 r95c4776  
    9999        status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
    100100        if (status & INTR_DISPATCH_STATUS_BUSY)
    101                 panic("Interrupt Dispatch Status busy bit set.");
     101                panic("Interrupt Dispatch Status busy bit set\n");
    102102       
    103103        ASSERT(!(pstate_read() & PSTATE_IE_BIT));
     
    152152                break;
    153153        default:
    154                 panic("Unknown IPI (%d).", ipi);
     154                panic("Unknown IPI (%d).\n", ipi);
    155155                break;
    156156        }
  • kernel/arch/sparc64/src/smp/sun4u/smp.c

    rc2efbb4 r95c4776  
    3636#include <genarch/ofw/ofw_tree.h>
    3737#include <cpu.h>
    38 #include <arch/cpu_family.h>
     38#include <arch/sun4u/cpu_family.h>
    3939#include <arch/cpu.h>
    4040#include <arch.h>
     
    4545#include <synch/waitq.h>
    4646#include <print.h>
    47 #include <arch/cpu_node.h>
     47#include <arch/sun4u/cpu_node.h>
    4848
    4949/**
     
    6262{
    6363        ofw_tree_node_t *node;
    64         size_t cnt = 0;
     64        count_t cnt = 0;
    6565       
    6666        if (is_us() || is_us_iii()) {
  • kernel/arch/sparc64/src/trap/interrupt.c

    rc2efbb4 r95c4776  
    11/*
    22 * Copyright (c) 2005 Jakub Jermar
     3 * Copyright (c) 2009 Pavel Rimsky
    34 * All rights reserved.
    45 *
     
    3435
    3536#include <arch/interrupt.h>
     37#include <arch/trap/interrupt.h>
    3638#include <arch/sparc64.h>
    37 #include <arch/trap/interrupt.h>
    3839#include <interrupt.h>
    3940#include <ddi/irq.h>
     
    6061        exc_register(n - 1, name, f);
    6162}
    62 
    63 /** Process hardware interrupt.
    64  *
    65  * @param n Ignored.
    66  * @param istate Ignored.
    67  */
    68 void interrupt(int n, istate_t *istate)
    69 {
    70         uint64_t status;
    71         uint64_t intrcv;
    72         uint64_t data0;
    73         status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
    74         if (status & (!INTR_DISPATCH_STATUS_BUSY))
    75                 panic("Interrupt Dispatch Status busy bit not set.");
    76 
    77         intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
    78 #if defined (US)
    79         data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);
    80 #elif defined (US3)
    81         data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);
    82 #endif
    83 
    84         irq_t *irq = irq_dispatch_and_lock(data0);
    85         if (irq) {
    86                 /*
    87                  * The IRQ handler was found.
    88                  */
    89                 irq->handler(irq);
    90                 /*
    91                  * See if there is a clear-interrupt-routine and call it.
    92                  */
    93                 if (irq->cir) {
    94                         irq->cir(irq->cir_arg, irq->inr);
    95                 }
    96                 spinlock_unlock(&irq->lock);
    97         } else if (data0 > config.base) {
    98                 /*
    99                  * This is a cross-call.
    100                  * data0 contains address of the kernel function.
    101                  * We call the function only after we verify
    102                  * it is one of the supported ones.
    103                  */
    104 #ifdef CONFIG_SMP
    105                 if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {
    106                         tlb_shootdown_ipi_recv();
    107                 }
    108 #endif
    109         } else {
    110                 /*
    111                  * Spurious interrupt.
    112                  */
    113 #ifdef CONFIG_DEBUG
    114                 printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64
    115                     ", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);
    116 #endif
    117         }
    118 
    119         membar();
    120         asi_u64_write(ASI_INTR_RECEIVE, 0, 0);
    121 }
    122 
    12363/** @}
    12464 */
  • kernel/generic/include/cpu.h

    rc2efbb4 r95c4776  
    4848 * There is one structure like this for every processor.
    4949 */
    50 typedef struct {
     50typedef struct cpu {
    5151        SPINLOCK_DECLARE(lock);
    5252
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