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Changeset 904b1bc in mainline


Ignore:
Timestamp:
2018-05-22T10:36:58Z (3 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master
Children:
a4eb3ba2
Parents:
4f8772d4
git-author:
Jiri Svoboda <jiri@…> (2018-05-21 17:36:30)
git-committer:
Jiri Svoboda <jiri@…> (2018-05-22 10:36:58)
Message:

Fix remaining ccheck issues.

Files:
38 edited

Legend:

Unmodified
Added
Removed
  • boot/generic/src/inflate.c

    r4f8772d4 r904b1bc  
    319319    uint16_t *symbol)
    320320{
    321         uint16_t code = 0; /* Decoded bits */
    322         size_t first = 0;  /* First code of the given length */
    323         size_t index = 0;  /* Index of the first code of the given length
    324                               in the symbol table */
     321        /* Decoded bits */
     322        uint16_t code = 0;
     323
     324        /* First code of the given length */
     325        size_t first = 0;
     326
     327        /*
     328         * Index of the first code of the given length
     329         * in the symbol table
     330         */
     331        size_t index = 0;
    325332
    326333        size_t len;  /* Current number of bits in the code */
  • kernel/arch/arm32/include/arch/cp15.h

    r4f8772d4 r904b1bc  
    4040
    4141/** See ARM Architecture reference manual ch. B3.17.1 page B3-1456
    42  * for the list */
     42 * for the list
     43 */
    4344
    4445#define CONTROL_REG_GEN_READ(name, crn, opc1, crm, opc2) \
     
    183184        CCSIDR_LINESIZE_MASK = 0x7,
    184185        CCSIDR_LINESIZE_SHIFT = 0,
     186};
     187
    185188#define CCSIDR_SETS(val) \
    186189        (((val >> CCSIDR_NUMSETS_SHIFT) & CCSIDR_NUMSETS_MASK) + 1)
     
    190193#define CCSIDR_LINESIZE_LOG(val) \
    191194        (((val >> CCSIDR_LINESIZE_SHIFT) & CCSIDR_LINESIZE_MASK) + 2 + 2)
    192 };
     195
    193196CONTROL_REG_GEN_READ(CCSIDR, c0, 1, c0, 0);
    194197
     
    206209        CLIDR_UNI_CACHE = 0x4,
    207210        CLIDR_CACHE_MASK = 0x7,
     211};
     212
    208213/** levels counted from 0 */
    209214#define CLIDR_CACHE(level, val)   ((val >> (level * 3)) & CLIDR_CACHE_MASK)
    210 };
     215
    211216CONTROL_REG_GEN_READ(CLIDR, c0, 1, c0, 1);
    212217CONTROL_REG_GEN_READ(AIDR, c0, 1, c0, 7); /* Implementation defined or MIDR */
     
    225230
    226231/* System control registers */
    227 /* COntrol register bit values see ch. B4.1.130 of ARM Architecture Reference
    228  * Manual ARMv7-A and ARMv7-R edition, page 1687 */
     232/*
     233 * Control register bit values see ch. B4.1.130 of ARM Architecture Reference
     234 * Manual ARMv7-A and ARMv7-R edition, page 1687
     235 */
    229236enum {
    230237        SCTLR_MMU_EN_FLAG            = 1 << 0,
  • kernel/arch/sparc64/include/arch/mm/sun4u/tsb.h

    r4f8772d4 r904b1bc  
    6666        uint64_t value;
    6767        struct {
    68                 uint64_t base : 51;     /**< TSB base address, bits 63:13. */
    69                 unsigned split : 1;     /**< Split vs. common TSB for 8K and 64K
    70                                          * pages. HelenOS uses only 8K pages
    71                                          * for user mappings, so we always set
    72                                          * this to 0.
    73                                          */
     68                /** TSB base address, bits 63:13. */
     69                uint64_t base : 51;
     70                /** Split vs. common TSB for 8K and 64K pages. HelenOS uses
     71                 * only 8K pages for user mappings, so we always set this to 0.
     72                 */
     73                unsigned split : 1;
    7474                unsigned : 9;
    75                 unsigned size : 3;      /**< TSB size. Number of entries is
    76                                          * 512 * 2^size. */
     75                /** TSB size. Number of entries is 512 * 2^size. */
     76                unsigned size : 3;
    7777        } __attribute__((packed));
    7878} tsb_base_reg_t;
  • kernel/arch/sparc64/include/arch/sun4u/cpu.h

    r4f8772d4 r904b1bc  
    6262
    6363typedef struct {
    64         uint32_t mid;              /**< Processor ID as read from
    65                                         UPA_CONFIG/FIREPLANE_CONFIG. */
     64        /** Processor ID as read from UPA_CONFIG/FIREPLANE_CONFIG. */
     65        uint32_t mid;
    6666        ver_reg_t ver;
    67         uint32_t clock_frequency;  /**< Processor frequency in Hz. */
    68         uint64_t next_tick_cmpr;   /**< Next clock interrupt should be
    69                                         generated when the TICK register
    70                                         matches this value. */
     67        /** Processor frequency in Hz. */
     68        uint32_t clock_frequency;
     69        /** Next clock interrupt should be generated when the TICK register
     70         * matches this value.
     71         */
     72        uint64_t next_tick_cmpr;
    7173} cpu_arch_t;
    7274
  • kernel/arch/sparc64/include/arch/sun4v/cpu.h

    r4f8772d4 r904b1bc  
    5959
    6060typedef struct cpu_arch {
    61         uint64_t id;                  /**< virtual processor ID */
    62         uint32_t clock_frequency;     /**< Processor frequency in Hz. */
    63         uint64_t next_tick_cmpr;      /**< Next clock interrupt should be
    64                                            generated when the TICK register
    65                                            matches this value. */
    66         exec_unit_t *exec_unit;       /**< Physical core. */
    67         unsigned long proposed_nrdy;  /**< Proposed No. of ready threads
    68                                            so that cores are equally balanced. */
     61        /** Virtual processor ID */
     62        uint64_t id;
     63        /** Processor frequency in Hz */
     64        uint32_t clock_frequency;
     65        /** Next clock interrupt should be generated when the TICK register
     66         * matches this value.
     67         */
     68        uint64_t next_tick_cmpr;
     69        /** Physical core. */
     70        exec_unit_t *exec_unit;
     71        /** Proposed No. of ready threads so that cores are equally balanced. */
     72        unsigned long proposed_nrdy;
    6973} cpu_arch_t;
    7074
  • kernel/arch/sparc64/src/mm/sun4u/tsb.c

    r4f8772d4 r904b1bc  
    9797         */
    9898
    99         tte->tag.invalid = true;        /* invalidate the entry
    100                                          * (tag target has this
    101                                          * set to 0) */
     99        /* Invalidate the entry (tag target has this set to 0) */
     100        tte->tag.invalid = true;
    102101
    103102        write_barrier();
     
    142141         */
    143142
    144         tte->tag.invalid = true;        /* invalidate the entry
    145                                          * (tag target has this
    146                                          * set to 0) */
     143        /* Invalidate the entry (tag target has this set to 0) */
     144        tte->tag.invalid = true;
    147145
    148146        write_barrier();
  • kernel/arch/sparc64/src/sun4v/md.c

    r4f8772d4 r904b1bc  
    6666/** machine description element (in the node block) */
    6767typedef struct {
    68         uint8_t tag;                    /**< Type of element */
    69         uint8_t name_len;               /**< Length in bytes of element name */
    70         uint16_t _reserved_field;       /**< reserved field (zeros) */
    71         uint32_t name_offset;           /**< Location offset of name associated
    72                                              with this element relative to
    73                                              start of name block */
     68        /** Type of element */
     69        uint8_t tag;
     70        /** Length in bytes of element name */
     71        uint8_t name_len;
     72        /** Reserved field (zeros) */
     73        uint16_t _reserved_field;
     74        /** Location offset of name associated with this element relative to
     75         * start of name block
     76         */
     77        uint32_t name_offset;
     78
    7479        union {
    7580                /** for elements of type “PROP_STR” and of type “PROP_DATA” */
  • kernel/doc/doxygroups.h

    r4f8772d4 r904b1bc  
    11
    22/* Definitions of modules and its relations for generating Doxygen documentation */
     3
     4/** @defgroup kernel Kernel
     5 */
    36
    47/** @defgroup genericadt Data types
     
    1417 */
    1518
    16 /**
    17   * @defgroup time Time management
    18   * @ingroup kernel
    19   */
    20 
    21 /**
    22   * @defgroup proc Scheduling
    23   * @ingroup kernel
    24   */
    25 
    26         /** @defgroup genericproc generic
    27         * @ingroup proc
    28         */
    29 
    30 
    31         /**
    32          * @cond amd64
    33          * @defgroup amd64proc amd64
    34          * @ingroup proc
    35          * @endcond
    36          */
    37 
    38          /**
    39          * @cond arm32
    40          * @defgroup arm32proc arm32
    41          * @ingroup proc
    42          * @endcond
    43          */
    44 
    45         /**
    46          * @cond ia32
    47          * @defgroup ia32proc ia32
    48          * @ingroup proc
    49          * @endcond
    50          */
    51 
    52         /**
    53          * @cond ia64
    54          * @defgroup ia64proc ia64
    55          * @ingroup proc
    56          * @endcond
    57          */
    58 
    59         /**
    60          * @cond mips32
    61          * @defgroup mips32proc mips32
    62          * @ingroup proc
    63          * @endcond
    64          */
    65 
    66         /**
    67          * @cond ppc32
    68          * @defgroup ppc32proc ppc32
    69          * @ingroup proc
    70          * @endcond
    71          */
    72 
    73         /**
    74          * @cond ppc64
    75          * @defgroup ppc64proc ppc64
    76          * @ingroup proc
    77          * @endcond
    78          */
    79 
    80         /**
    81          * @cond sparc64
    82          * @defgroup sparc64proc sparc64
    83          * @ingroup proc
    84          * @endcond
    85          */
     19/** @defgroup time Time management
     20 * @ingroup kernel
     21 */
     22
     23/** @defgroup proc Scheduling
     24 * @ingroup kernel
     25 */
     26
     27/**    @defgroup genericproc generic
     28 *     @ingroup proc
     29 */
     30
     31
     32/**
     33 *     @cond amd64
     34 *     @defgroup amd64proc amd64
     35 *     @ingroup proc
     36 *     @endcond
     37 */
     38
     39/**
     40 *     @cond arm32
     41 *     @defgroup arm32proc arm32
     42 *     @ingroup proc
     43 *     @endcond
     44 */
     45
     46/**
     47 *     @cond ia32
     48 *     @defgroup ia32proc ia32
     49 *     @ingroup proc
     50 *     @endcond
     51 */
     52
     53/**
     54 *     @cond ia64
     55 *     @defgroup ia64proc ia64
     56 *     @ingroup proc
     57 *     @endcond
     58 */
     59
     60/**
     61 *     @cond mips32
     62 *     @defgroup mips32proc mips32
     63 *     @ingroup proc
     64 *     @endcond
     65 */
     66
     67/**
     68 *     @cond ppc32
     69 *     @defgroup ppc32proc ppc32
     70 *     @ingroup proc
     71 *     @endcond
     72 */
     73
     74/**
     75 *     @cond ppc64
     76 *     @defgroup ppc64proc ppc64
     77 *     @ingroup proc
     78 *     @endcond
     79 */
     80
     81/**
     82 *     @cond sparc64
     83 *     @defgroup sparc64proc sparc64
     84 *     @ingroup proc
     85 *     @endcond
     86 */
    8687
    8788
     
    9192
    9293
    93  /** @defgroup mm Memory management
    94   * @ingroup kernel
    95   */
    96 
    97         /**
    98          * @defgroup genericmm generic
    99          * @ingroup mm
    100         */
    101 
    102         /**
    103          * @defgroup genarchmm genarch
    104          * @ingroup mm
    105         */
    106 
    107         /**
    108          * @cond amd64
    109          * @defgroup amd64mm amd64
    110          * @ingroup mm
    111          * @endcond
    112         */
    113 
    114         /**
    115          * @cond arm32
    116          * @defgroup arm32mm arm32
    117          * @ingroup mm
    118          * @endcond
    119         */
    120 
    121         /**
    122          * @cond ia32
    123          * @defgroup ia32mm ia32
    124          * @ingroup mm
    125          * @endcond
    126         */
    127 
    128         /**
    129          * @cond ia64
    130          * @defgroup ia64mm ia64
    131          * @ingroup mm
    132          * @endcond
    133         */
    134 
    135         /**
    136          * @cond mips32
    137          * @defgroup mips32mm mips32
    138          * @ingroup mm
    139          * @endcond
    140         */
    141 
    142         /**
    143          * @cond ppc32
    144          * @defgroup ppc32mm ppc32
    145          * @ingroup mm
    146          * @endcond
    147         */
    148 
    149         /**
    150          * @cond ppc64
    151          * @defgroup ppc64mm ppc64
    152          * @ingroup mm
    153          * @endcond
    154         */
    155 
    156         /**
    157          * @cond sparc64
    158          * @defgroup sparc64mm sparc64
    159          * @ingroup mm
    160          * @endcond
    161         */
     94/** @defgroup mm Memory management
     95 * @ingroup kernel
     96 */
     97
     98/**
     99 *    @defgroup genericmm generic
     100 *    @ingroup mm
     101 */
     102
     103/**
     104 *    @defgroup genarchmm genarch
     105 *    @ingroup mm
     106 */
     107
     108/**
     109 *    @cond amd64
     110 *    @defgroup amd64mm amd64
     111 *    @ingroup mm
     112 *    @endcond
     113 */
     114
     115/**
     116 *    @cond arm32
     117 *    @defgroup arm32mm arm32
     118 *    @ingroup mm
     119 *    @endcond
     120 */
     121
     122/**
     123 *    @cond ia32
     124 *    @defgroup ia32mm ia32
     125 *    @ingroup mm
     126 *    @endcond
     127 */
     128
     129/**
     130 *    @cond ia64
     131 *    @defgroup ia64mm ia64
     132 *    @ingroup mm
     133 *    @endcond
     134 */
     135
     136/**
     137 *    @cond mips32
     138 *    @defgroup mips32mm mips32
     139 *    @ingroup mm
     140 *    @endcond
     141 */
     142
     143/**
     144 *    @cond ppc32
     145 *    @defgroup ppc32mm ppc32
     146 *    @ingroup mm
     147 *    @endcond
     148 */
     149
     150/**
     151 *    @cond ppc64
     152 *    @defgroup ppc64mm ppc64
     153 *    @ingroup mm
     154 *    @endcond
     155 */
     156
     157/**
     158 *    @cond sparc64
     159 *    @defgroup sparc64mm sparc64
     160 *    @ingroup mm
     161 *    @endcond
     162 */
    162163
    163164
     
    177178 */
    178179
    179         /** @defgroup genericddi generic
    180         * @ingroup ddi
    181         */
    182 
    183         /**
    184          * @cond amd64
    185          * @defgroup amd64ddi amd64
    186          * @ingroup ddi
    187          * @endcond
    188          */
    189 
    190         /**
    191          * @cond arm32
    192          * @defgroup arm32ddi arm32
    193          * @ingroup ddi
    194          * @endcond
    195          */
    196 
    197         /**
    198          * @cond ia32
    199          * @defgroup ia32ddi ia32
    200          * @ingroup ddi
    201          * @endcond
    202          */
    203 
    204         /**
    205          * @cond ia64
    206          * @defgroup ia64ddi ia64
    207          * @ingroup ddi
    208          * @endcond
    209          */
    210 
    211         /**
    212          * @cond mips32
    213          * @defgroup mips32ddi mips32
    214          * @ingroup ddi
    215          * @endcond
    216          */
    217 
    218         /**
    219          * @cond ppc32
    220          * @defgroup ppc32ddi ppc32
    221          * @ingroup ddi
    222          * @endcond
    223          */
    224 
    225         /**
    226          * @cond ppc64
    227          * @defgroup ppc64ddi ppc64
    228          * @ingroup ddi
    229          * @endcond
    230          */
    231 
    232         /**
    233          * @cond sparc64
    234          * @defgroup sparc64ddi sparc64
    235          * @ingroup ddi
    236          * @endcond
    237          */
    238 
    239  /** @defgroup debug Debugging
     180/**
     181 *     @defgroup genericddi generic
     182 *     @ingroup ddi
     183 */
     184
     185/**
     186 *     @cond amd64
     187 *     @defgroup amd64ddi amd64
     188 *     @ingroup ddi
     189 *     @endcond
     190 */
     191
     192/**
     193 *     @cond arm32
     194 *     @defgroup arm32ddi arm32
     195 *     @ingroup ddi
     196 *     @endcond
     197 */
     198
     199/**
     200 *     @cond ia32
     201 *     @defgroup ia32ddi ia32
     202 *     @ingroup ddi
     203 *     @endcond
     204 */
     205
     206/**
     207 *     @cond ia64
     208 *     @defgroup ia64ddi ia64
     209 *     @ingroup ddi
     210 *     @endcond
     211 */
     212
     213/**
     214 *     @cond mips32
     215 *     @defgroup mips32ddi mips32
     216 *     @ingroup ddi
     217 *     @endcond
     218 */
     219
     220/**
     221 *     @cond ppc32
     222 *     @defgroup ppc32ddi ppc32
     223 *     @ingroup ddi
     224 *     @endcond
     225 */
     226
     227/**
     228 *     @cond ppc64
     229 *     @defgroup ppc64ddi ppc64
     230 *     @ingroup ddi
     231 *     @endcond
     232 */
     233
     234/**
     235 *     @cond sparc64
     236 *     @defgroup sparc64ddi sparc64
     237 *     @ingroup ddi
     238 *     @endcond
     239 */
     240
     241/** @defgroup debug Debugging
    240242 * @ingroup others
    241243 */
    242244
    243         /** @defgroup genericdebug generic
    244         * @ingroup debug
    245         */
    246 
    247         /**
    248          * @cond amd64
    249          * @defgroup amd64debug ia32/amd64
    250          * @ingroup debug
    251          * @endcond
    252          */
    253 
    254         /**
    255          * @cond arm32
    256          * @defgroup arm32debug arm32
    257          * @ingroup debug
    258          * @endcond
    259          */
    260 
    261         /**
    262          * @cond ia32
    263          * @defgroup amd64debug ia32/amd64
    264          * @ingroup debug
    265          * @endcond
    266          */
    267 
    268         /**
    269          * @cond ia64
    270          * @defgroup ia64debug ia64
    271          * @ingroup debug
    272          * @endcond
    273          */
    274 
    275         /**
    276          * @cond mips32
    277          * @defgroup mips32debug mips32
    278          * @ingroup debug
    279          * @endcond
    280          */
    281 
    282         /**
    283          * @cond ppc32
    284          * @defgroup ppc32debug ppc32
    285          * @ingroup debug
    286          * @endcond
    287          */
    288 
    289         /**
    290          * @cond ppc64
    291          * @defgroup ppc64debug ppc64
    292          * @ingroup debug
    293          * @endcond
    294          */
    295 
    296         /**
    297          * @cond sparc64
    298          * @defgroup sparc64debug sparc64
    299          * @ingroup debug
    300          * @endcond
    301          */
    302 
    303  /** @defgroup interrupt Interrupt handling and dispatching
    304   * @ingroup kernel
    305   */
    306         /**
    307          * @defgroup genericinterrupt generic
    308          * @ingroup interrupt
    309          */
    310 
    311         /**
    312          * @cond amd64
    313          * @defgroup amd64interrupt amd64
    314          * @ingroup interrupt
    315          * @endcond
    316          */
    317 
    318         /**
    319          * @cond arm32
    320          * @defgroup arm32interrupt arm32
    321          * @ingroup interrupt
    322          * @endcond
    323          */
    324 
    325         /**
    326          * @cond ia32
    327          * @defgroup ia32interrupt ia32
    328          * @ingroup interrupt
    329          * @endcond
    330          */
    331 
    332         /**
    333          * @cond ia64
    334          * @defgroup ia64interrupt ia64
    335          * @ingroup interrupt
    336          * @endcond
    337          */
    338 
    339         /**
    340          * @cond mips32
    341          * @defgroup mips32interrupt mips32
    342          * @ingroup interrupt
    343          * @endcond
    344          */
    345 
    346         /**
    347          * @cond ppc32
    348          * @defgroup ppc32interrupt ppc32
    349          * @ingroup interrupt
    350          * @endcond
    351          */
    352 
    353         /**
    354          * @cond ppc64
    355          * @defgroup ppc64interrupt ppc64
    356          * @ingroup interrupt
    357          * @endcond
    358          */
    359 
    360         /**
    361          * @cond sparc64
    362          * @defgroup sparc64interrupt sparc64
    363          * @ingroup interrupt
    364          * @endcond
    365          */
     245/**
     246 *     @defgroup genericdebug generic
     247 *     @ingroup debug
     248 */
     249
     250/**
     251 *     @cond amd64
     252 *     @defgroup amd64debug ia32/amd64
     253 *     @ingroup debug
     254 *     @endcond
     255 */
     256
     257/**
     258 *     @cond arm32
     259 *     @defgroup arm32debug arm32
     260 *     @ingroup debug
     261 *     @endcond
     262 */
     263
     264/**
     265 *     @cond ia32
     266 *     @defgroup amd64debug ia32/amd64
     267 *     @ingroup debug
     268 *     @endcond
     269 */
     270
     271/**
     272 *     @cond ia64
     273 *     @defgroup ia64debug ia64
     274 *     @ingroup debug
     275 *     @endcond
     276 */
     277
     278/**
     279 *     @cond mips32
     280 *     @defgroup mips32debug mips32
     281 *     @ingroup debug
     282 *     @endcond
     283 */
     284
     285/**
     286 *     @cond ppc32
     287 *     @defgroup ppc32debug ppc32
     288 *     @ingroup debug
     289 *     @endcond
     290 */
     291
     292/**
     293 *     @cond ppc64
     294 *     @defgroup ppc64debug ppc64
     295 *     @ingroup debug
     296 *     @endcond
     297 */
     298
     299/**
     300 *     @cond sparc64
     301 *     @defgroup sparc64debug sparc64
     302 *     @ingroup debug
     303 *     @endcond
     304 */
     305
     306/** @defgroup interrupt Interrupt handling and dispatching
     307 * @ingroup kernel
     308 */
     309/**
     310 *     @defgroup genericinterrupt generic
     311 *     @ingroup interrupt
     312 */
     313
     314/**
     315 *     @cond amd64
     316 *     @defgroup amd64interrupt amd64
     317 *     @ingroup interrupt
     318 *     @endcond
     319 */
     320
     321/**
     322 *     @cond arm32
     323 *     @defgroup arm32interrupt arm32
     324 *     @ingroup interrupt
     325 *     @endcond
     326 */
     327
     328/**
     329 *     @cond ia32
     330 *     @defgroup ia32interrupt ia32
     331 *     @ingroup interrupt
     332 *     @endcond
     333 */
     334
     335/**
     336 *     @cond ia64
     337 *     @defgroup ia64interrupt ia64
     338 *     @ingroup interrupt
     339 *     @endcond
     340 */
     341
     342/**
     343 *     @cond mips32
     344 *     @defgroup mips32interrupt mips32
     345 *     @ingroup interrupt
     346 *     @endcond
     347 */
     348
     349/**
     350 *     @cond ppc32
     351 *     @defgroup ppc32interrupt ppc32
     352 *     @ingroup interrupt
     353 *     @endcond
     354 */
     355
     356/**
     357 *     @cond ppc64
     358 *     @defgroup ppc64interrupt ppc64
     359 *     @ingroup interrupt
     360 *     @endcond
     361 */
     362
     363/**
     364 *     @cond sparc64
     365 *     @defgroup sparc64interrupt sparc64
     366 *     @ingroup interrupt
     367 *     @endcond
     368 */
    366369
    367370
     
    369372 * @ingroup kernel
    370373 */
    371         /** @defgroup generic generic
    372         * @ingroup others
    373         */
    374 
    375         /** @defgroup genarch genarch
    376         * @ingroup others
    377         */
    378 
    379         /**
    380          * @cond amd64
    381          * @defgroup amd64 amd64
    382          * @ingroup others
    383          * @endcond
    384          */
    385 
    386         /**
    387          * @cond arm32
    388          * @defgroup arm32 arm32
    389          * @ingroup others
    390          * @endcond
    391          */
    392 
    393         /**
    394          * @cond ia32
    395          * @defgroup ia32 ia32
    396          * @ingroup others
    397          * @endcond
    398          */
    399 
    400         /**
    401          * @cond ia64
    402          * @defgroup ia64 ia64
    403          * @ingroup others
    404          * @endcond
    405          */
    406 
    407         /**
    408          * @cond mips32
    409          * @defgroup mips32 mips32
    410          * @ingroup others
    411          * @endcond
    412          */
    413 
    414         /**
    415          * @cond ppc32
    416          * @defgroup ppc32 ppc32
    417          * @ingroup others
    418          * @endcond
    419          */
    420 
    421         /**
    422          * @cond ppc64
    423          * @defgroup ppc64 ppc64
    424          * @ingroup others
    425          * @endcond
    426          */
    427 
    428         /**
    429          * @cond sparc64
    430          * @defgroup sparc64 sparc64
    431          * @ingroup others
    432          * @endcond
    433          */
     374
     375/**
     376 *     @defgroup generic generic
     377 *     @ingroup others
     378 */
     379
     380/**
     381 *     @defgroup genarch genarch
     382 *     @ingroup others
     383 */
     384
     385/**
     386 *     @cond amd64
     387 *     @defgroup amd64 amd64
     388 *     @ingroup others
     389 *     @endcond
     390 */
     391
     392/**
     393 *     @cond arm32
     394 *     @defgroup arm32 arm32
     395 *     @ingroup others
     396 *     @endcond
     397 */
     398
     399/**
     400 *     @cond ia32
     401 *     @defgroup ia32 ia32
     402 *     @ingroup others
     403 *     @endcond
     404 */
     405
     406/**
     407 *     @cond ia64
     408 *     @defgroup ia64 ia64
     409 *     @ingroup others
     410 *     @endcond
     411 */
     412
     413/**
     414 *     @cond mips32
     415 *     @defgroup mips32 mips32
     416 *     @ingroup others
     417 *     @endcond
     418 */
     419
     420/**
     421 *     @cond ppc32
     422 *     @defgroup ppc32 ppc32
     423 *     @ingroup others
     424 *     @endcond
     425 */
     426
     427/**
     428 *     @cond ppc64
     429 *     @defgroup ppc64 ppc64
     430 *     @ingroup others
     431 *     @endcond
     432 */
     433
     434/**
     435 *     @cond sparc64
     436 *     @defgroup sparc64 sparc64
     437 *     @ingroup others
     438 *     @endcond
     439 */
  • kernel/genarch/include/genarch/drivers/omap/irc.h

    r4f8772d4 r904b1bc  
    5050        const uint8_t padd0[12];
    5151
    52         /* This register controls the various parameters
     52        /*
     53         * This register controls the various parameters
    5354         * of the OCP interface.
    5455         */
     
    7879#define OMAP_IRC_CONTROL_NEWFIQAGR_FLAG       (1 << 1)
    7980
    80         /* This register controls protection of the other registers.
     81        /*
     82         * This register controls protection of the other registers.
    8183         * This register can only be accessed in priviledged mode, regardless
    8284         * of the current value of the protection bit.
     
    8587#define OMAP_IRC_PROTECTION_FLAG              (1 << 0)
    8688
    87         /* This register controls the clock auto-idle for the functional
     89        /*
     90         * This register controls the clock auto-idle for the functional
    8891         * clock and the input synchronizers.
    8992         */
     
    119122                ioport32_t mir;
    120123
    121                 /* This register is used to clear the interrupt mask bits,
     124                /*
     125                 * This register is used to clear the interrupt mask bits,
    122126                 * Write 1 clears the mask bit to 0.
    123127                 */
    124128                ioport32_t mir_clear;
    125129
    126                 /* This register is used to set the interrupt mask bits,
     130                /*
     131                 * This register is used to set the interrupt mask bits,
    127132                 * Write 1 sets the mask bit to 1.
    128133                 */
    129134                ioport32_t mir_set;
    130135
    131                 /* This register is used to set the software interrupt bits,
     136                /*
     137                 * This register is used to set the software interrupt bits,
    132138                 * it is also used to read the current active software
    133139                 * interrupts.
     
    136142                ioport32_t isr_set;
    137143
    138                 /* This register is used to clear the software interrups bits.
     144                /*
     145                 * This register is used to clear the software interrups bits.
    139146                 * Write 1 clears the software interrupt bits to 0.
    140147                 */
     
    150157        const uint32_t padd4[8 * OMAP_IRC_IRQ_GROUPS_PAD];
    151158
    152         /* These registers contain the priority for the interrups and
     159        /*
     160         * These registers contain the priority for the interrups and
    153161         * the FIQ/IRQ steering.
    154162         */
    155163        ioport32_t ilr[OMAP_IRC_IRQ_COUNT];
     164
     165} omap_irc_regs_t;
     166
    156167/* 0 = Interrupt routed to IRQ, 1 = interrupt routed to FIQ */
    157168#define OMAP_IRC_ILR_FIQNIRQ_FLAG    (1 << 0)
     
    159170#define OMAP_IRC_ILR_PRIORITY_SHIFT  2
    160171
    161 } omap_irc_regs_t;
    162 
    163172static inline void omap_irc_init(omap_irc_regs_t *regs)
    164173{
     
    167176        /* Initialization sequence */
    168177
    169         /* 1 - Program the SYSCONFIG register: if necessary, enable the
     178        /*
     179         * 1 - Program the SYSCONFIG register: if necessary, enable the
    170180         *     autogating by setting the AUTOIDLE bit.
    171181         */
    172182        regs->sysconfig &= ~OMAP_IRC_SYSCONFIG_AUTOIDLE_FLAG;
    173183
    174         /* 2 - Program the IDLE register: if necessary, disable functional
     184        /*
     185         * 2 - Program the IDLE register: if necessary, disable functional
    175186         *     clock autogating or enable synchronizer autogating by setting
    176187         *     the FUNCIDLE bit or the TURBO bit accordingly.
     
    179190        regs->idle &= ~OMAP_IRC_IDLE_TURBO_FLAG;
    180191
    181         /* 3 - Program ILRm register for each interrupt line: Assign a
     192        /*
     193         * 3 - Program ILRm register for each interrupt line: Assign a
    182194         *     priority level and set the FIQNIRQ bit for an FIQ interrupt
    183195         *     (by default, interrupts are mapped to IRQ and
     
    188200                regs->ilr[i] = 0;
    189201
    190         /* 4 - Program the MIRn register: Enable interrupts (by default,
     202        /*
     203         * 4 - Program the MIRn register: Enable interrupts (by default,
    191204         *     all interrupt lines are masked).
    192205         */
  • kernel/generic/include/ddi/ddi.h

    r4f8772d4 r904b1bc  
    4343/** Structure representing contiguous physical memory area. */
    4444typedef struct {
    45         link_t link;      /**< Linked list link */
     45        /** Linked list link */
     46        link_t link;
    4647
    47         uintptr_t pbase;  /**< Physical base of the area. */
    48         pfn_t frames;     /**< Number of frames in the area. */
    49         bool unpriv;      /**< Allow mapping by unprivileged tasks. */
    50         bool mapped;      /**< Indicate whether the area is actually
    51                                mapped. */
     48        /** Physical base of the area. */
     49        uintptr_t pbase;
     50        /** Number of frames in the area. */
     51        pfn_t frames;
     52        /** Allow mapping by unprivileged tasks. */
     53        bool unpriv;
     54        /** Indicate whether the area is actually mapped. */
     55        bool mapped;
    5256} parea_t;
    5357
  • uspace/app/mkfat/fat.h

    r4f8772d4 r904b1bc  
    5151
    5252typedef struct fat_bs {
    53         uint8_t         ji[3];          /**< Jump instruction. */
     53        /** Jump instruction */
     54        uint8_t         ji[3];
    5455        uint8_t         oem_name[8];
     56
    5557        /* BIOS Parameter Block */
    56         uint16_t        bps;            /**< Bytes per sector. */
    57         uint8_t         spc;            /**< Sectors per cluster. */
    58         uint16_t        rscnt;          /**< Reserved sector count. */
    59         uint8_t         fatcnt;         /**< Number of FATs. */
    60         uint16_t        root_ent_max;   /**< Maximum number of root directory
    61                                              entries. */
    62         uint16_t        totsec16;       /**< Total sectors. 16-bit version. */
    63         uint8_t         mdesc;          /**< Media descriptor. */
    64         uint16_t        sec_per_fat;    /**< Sectors per FAT12/FAT16. */
    65         uint16_t        sec_per_track;  /**< Sectors per track. */
    66         uint16_t        headcnt;        /**< Number of heads. */
    67         uint32_t        hidden_sec;     /**< Hidden sectors. */
    68         uint32_t        totsec32;       /**< Total sectors. 32-bit version. */
     58
     59        /** Bytes per sector */
     60        uint16_t        bps;
     61        /** Sectors per cluster */
     62        uint8_t         spc;
     63        /** Reserved sector count */
     64        uint16_t        rscnt;
     65        /** Number of FATs */
     66        uint8_t         fatcnt;
     67        /** Maximum number of root directory entries */
     68        uint16_t        root_ent_max;
     69        /** Total sectors. 16-bit version */
     70        uint16_t        totsec16;
     71        /** Media descriptor */
     72        uint8_t         mdesc;
     73        /** Sectors per FAT12/FAT16 */
     74        uint16_t        sec_per_fat;
     75        /** Sectors per track */
     76        uint16_t        sec_per_track;
     77        /** Number of heads */
     78        uint16_t        headcnt;
     79        /** Hidden sectors */
     80        uint32_t        hidden_sec;
     81        /** Total sectors. 32-bit version */
     82        uint32_t        totsec32;
    6983
    7084        union {
  • uspace/app/mkmfs/mkmfs.c

    r4f8772d4 r904b1bc  
    9898
    9999static struct option const long_options[] = {
    100                 { "help", no_argument, 0, 'h' },
    101                 { "long-names", no_argument, 0, 'l' },
    102                 { "block-size", required_argument, 0, 'b' },
    103                 { "inodes", required_argument, 0, 'i' },
    104                 { NULL, no_argument, 0, '1' },
    105                 { NULL, no_argument, 0, '2' },
    106                 { 0, 0, 0, 0 }
     100        { "help", no_argument, 0, 'h' },
     101        { "long-names", no_argument, 0, 'l' },
     102        { "block-size", required_argument, 0, 'b' },
     103        { "inodes", required_argument, 0, 'i' },
     104        { NULL, no_argument, 0, '1' },
     105        { NULL, no_argument, 0, '2' },
     106        { 0, 0, 0, 0 }
    107107};
    108108
     
    495495
    496496                if (sb->fs_version == 3) {
    497                         if(INT32_MAX / sb->block_size < zones)
     497                        if (INT32_MAX / sb->block_size < zones)
    498498                                sb->max_file_size = INT32_MAX;
    499499                        sb->ino_per_block = V3_INODES_PER_BLOCK(sb->block_size);
     
    730730{
    731731        if (level == HELP_SHORT) {
    732                 printf(NAME": tool to create new Minix file systems\n");
     732                printf(NAME ": tool to create new Minix file systems\n");
    733733        } else {
    734734                printf("Usage: [options] device\n"
     
    737737                    "-b ##      Specify the block size in bytes (V3 only),\n"
    738738                    "           valid block size values are 1024, 2048 and"
    739                                 " 4096 bytes per block\n"
     739                    /* ...   */ " 4096 bytes per block\n"
    740740                    "-i ##      Specify the number of inodes"
    741                                 " for the filesystem\n"
     741                    /* ...   */ " for the filesystem\n"
    742742                    "-l         Use 30-char long filenames (V1/V2 only)\n");
    743743        }
  • uspace/app/sbi/src/builtin/bi_error.c

    r4f8772d4 r904b1bc  
    4848
    4949        builtin_code_snippet(bi,
    50                 "class Error is\n"
    51                         /* Common ancestor of all error classes */
    52                         "class Base is\n"
    53                         "end\n"
    54                         /* Accessing nil reference */
    55                         "class NilReference : Base is\n"
    56                         "end\n"
    57                         /* Array index out of bounds */
    58                         "class OutOfBounds : Base is\n"
    59                         "end\n"
    60                 "end\n");}
     50            "class Error is\n"
     51            "    -- Common ancestor of all error classes\n"
     52            "    class Base is\n"
     53            "    end\n"
     54            "    -- Accessing nil reference\n"
     55            "    class NilReference : Base is\n"
     56            "    end\n"
     57            "    -- Array index out of bounds\n"
     58            "    class OutOfBounds : Base is\n"
     59            "    end\n"
     60            "end\n");
     61}
    6162
    6263/** Bind error class hierarchy.
  • uspace/app/sbi/src/builtin/bi_textfile.c

    r4f8772d4 r904b1bc  
    6262
    6363        builtin_code_snippet(bi,
    64                 "class TextFile is\n"
    65                         "var f : resource;\n"
    66                         "\n"
    67                         "fun OpenRead(fname : string), builtin;\n"
    68                         "fun OpenWrite(fname : string), builtin;\n"
    69                         "fun Close(), builtin;\n"
    70                         "fun ReadLine() : string, builtin;\n"
    71                         "fun WriteLine(line : string), builtin;\n"
    72                         "\n"
    73                         "prop EOF : bool is\n"
    74                                 "get is\n"
    75                                         "return is_eof();\n"
    76                                 "end\n"
    77                         "end\n"
    78                         "\n"
    79                         "fun is_eof() : bool, builtin;\n"
    80                 "end\n");
     64            "class TextFile is\n"
     65            "    var f : resource;\n"
     66            "\n"
     67            "    fun OpenRead(fname : string), builtin;\n"
     68            "    fun OpenWrite(fname : string), builtin;\n"
     69            "    fun Close(), builtin;\n"
     70            "    fun ReadLine() : string, builtin;\n"
     71            "    fun WriteLine(line : string), builtin;\n"
     72            "\n"
     73            "    prop EOF : bool is\n"
     74            "        get is\n"
     75            "            return is_eof();\n"
     76            "        end\n"
     77            "    end\n"
     78            "\n"
     79            "    fun is_eof() : bool, builtin;\n"
     80            "end\n");
    8181
    8282}
     
    189189{
    190190        FILE *file;
    191         rdata_var_t *self_f_var;
     191        rdata_var_t *self_f_var;
    192192        run_proc_ar_t *proc_ar;
    193193
     
    227227{
    228228        FILE *file;
    229         rdata_var_t *self_f_var;
     229        rdata_var_t *self_f_var;
    230230
    231231        rdata_string_t *str;
     
    297297{
    298298        FILE *file;
    299         rdata_var_t *self_f_var;
     299        rdata_var_t *self_f_var;
    300300        rdata_var_t *line_var;
    301301        const char *line;
     
    340340{
    341341        FILE *file;
    342         rdata_var_t *self_f_var;
     342        rdata_var_t *self_f_var;
    343343
    344344        bool_t eof_flag;
  • uspace/app/trace/syscalls.c

    r4f8772d4 r904b1bc  
    3838
    3939const sc_desc_t syscall_desc[] = {
    40     [SYS_KIO] ={ "kio",                                 3,      V_INT_ERRNO },
     40        [SYS_KIO] = { "kio", 3, V_INT_ERRNO },
    4141
    42     [SYS_THREAD_CREATE] = { "thread_create",            3,      V_ERRNO },
    43     [SYS_THREAD_EXIT] = { "thread_exit",                1,      V_ERRNO },
    44     [SYS_THREAD_GET_ID] = { "thread_get_id",            1,      V_ERRNO },
     42        [SYS_THREAD_CREATE] = { "thread_create", 3, V_ERRNO },
     43        [SYS_THREAD_EXIT] = { "thread_exit", 1, V_ERRNO },
     44        [SYS_THREAD_GET_ID] = { "thread_get_id", 1, V_ERRNO },
    4545
    46     [SYS_TASK_GET_ID] = { "task_get_id",                1,      V_ERRNO },
    47     [SYS_TASK_SET_NAME] = { "task_set_name",            2,      V_ERRNO },
    48     [SYS_FUTEX_SLEEP] = { "futex_sleep_timeout",        3,      V_ERRNO },
    49     [SYS_FUTEX_WAKEUP] = { "futex_wakeup",              1,      V_ERRNO },
     46        [SYS_TASK_GET_ID] = { "task_get_id", 1, V_ERRNO },
     47        [SYS_TASK_SET_NAME] = { "task_set_name", 2, V_ERRNO },
     48        [SYS_FUTEX_SLEEP] = { "futex_sleep_timeout", 3, V_ERRNO },
     49        [SYS_FUTEX_WAKEUP] = { "futex_wakeup", 1, V_ERRNO },
    5050
    51     [SYS_AS_AREA_CREATE] = { "as_area_create",          5,      V_ERRNO },
    52     [SYS_AS_AREA_RESIZE] = { "as_area_resize",          3,      V_ERRNO },
    53     [SYS_AS_AREA_DESTROY] = { "as_area_destroy",        1,      V_ERRNO },
     51        [SYS_AS_AREA_CREATE] = { "as_area_create", 5, V_ERRNO },
     52        [SYS_AS_AREA_RESIZE] = { "as_area_resize", 3, V_ERRNO },
     53        [SYS_AS_AREA_DESTROY] = { "as_area_destroy", 1, V_ERRNO },
    5454
    55     [SYS_IPC_CALL_ASYNC_FAST] = { "ipc_call_async_fast", 6,     V_HASH },
    56     [SYS_IPC_CALL_ASYNC_SLOW] = { "ipc_call_async_slow", 3,     V_HASH },
     55        [SYS_IPC_CALL_ASYNC_FAST] = { "ipc_call_async_fast", 6, V_HASH },
     56        [SYS_IPC_CALL_ASYNC_SLOW] = { "ipc_call_async_slow", 3, V_HASH },
    5757
    58     [SYS_IPC_ANSWER_FAST] = { "ipc_answer_fast",        6,      V_ERRNO },
    59     [SYS_IPC_ANSWER_SLOW] = { "ipc_answer_slow",        2,      V_ERRNO },
    60     [SYS_IPC_FORWARD_FAST] = { "ipc_forward_fast",      6,      V_ERRNO },
    61     [SYS_IPC_FORWARD_SLOW] = { "ipc_forward_slow",      3,      V_ERRNO },
    62     [SYS_IPC_WAIT] = { "ipc_wait_for_call",             3,      V_HASH },
    63     [SYS_IPC_POKE] = { "ipc_poke",                      0,      V_ERRNO },
    64     [SYS_IPC_HANGUP] = { "ipc_hangup",                  1,      V_ERRNO },
     58        [SYS_IPC_ANSWER_FAST] = { "ipc_answer_fast", 6, V_ERRNO },
     59        [SYS_IPC_ANSWER_SLOW] = { "ipc_answer_slow", 2, V_ERRNO },
     60        [SYS_IPC_FORWARD_FAST] = { "ipc_forward_fast", 6, V_ERRNO },
     61        [SYS_IPC_FORWARD_SLOW] = { "ipc_forward_slow", 3, V_ERRNO },
     62        [SYS_IPC_WAIT] = { "ipc_wait_for_call", 3, V_HASH },
     63        [SYS_IPC_POKE] = { "ipc_poke", 0, V_ERRNO },
     64        [SYS_IPC_HANGUP] = { "ipc_hangup", 1, V_ERRNO },
    6565
    66     [SYS_IPC_EVENT_SUBSCRIBE] = { "ipc_event_subscribe",        2,      V_ERRNO },
    67     [SYS_IPC_EVENT_UNSUBSCRIBE] = { "ipc_event_unsubscribe",    1,      V_ERRNO },
    68     [SYS_IPC_EVENT_UNMASK] = { "ipc_event_unmask",      1,      V_ERRNO },
     66        [SYS_IPC_EVENT_SUBSCRIBE] = { "ipc_event_subscribe", 2, V_ERRNO },
     67        [SYS_IPC_EVENT_UNSUBSCRIBE] = { "ipc_event_unsubscribe", 1, V_ERRNO },
     68        [SYS_IPC_EVENT_UNMASK] = { "ipc_event_unmask", 1, V_ERRNO },
    6969
    70     [SYS_PERM_GRANT] = { "perm_grant",                  2,      V_ERRNO },
    71     [SYS_PERM_REVOKE] = { "perm_revoke",                2,      V_ERRNO },
    72     [SYS_PHYSMEM_MAP] = { "physmem_map",                4,      V_ERRNO },
    73     [SYS_IOSPACE_ENABLE] = { "iospace_enable",          1,      V_ERRNO },
     70        [SYS_PERM_GRANT] = { "perm_grant", 2, V_ERRNO },
     71        [SYS_PERM_REVOKE] = { "perm_revoke", 2, V_ERRNO },
     72        [SYS_PHYSMEM_MAP] = { "physmem_map", 4, V_ERRNO },
     73        [SYS_IOSPACE_ENABLE] = { "iospace_enable", 1, V_ERRNO },
    7474
    75     [SYS_IPC_IRQ_SUBSCRIBE] = { "ipc_irq_subscribe",    4,      V_ERRNO },
    76     [SYS_IPC_IRQ_UNSUBSCRIBE] = { "ipc_irq_unsubscribe",        2,      V_ERRNO },
     75        [SYS_IPC_IRQ_SUBSCRIBE] = { "ipc_irq_subscribe", 4, V_ERRNO },
     76        [SYS_IPC_IRQ_UNSUBSCRIBE] = { "ipc_irq_unsubscribe", 2, V_ERRNO },
    7777
    78     [SYS_SYSINFO_GET_VAL_TYPE] = { "sysinfo_get_val_type",              2,      V_INTEGER },
    79     [SYS_SYSINFO_GET_VALUE] = { "sysinfo_get_value",            3,      V_ERRNO },
    80     [SYS_SYSINFO_GET_DATA_SIZE] = { "sysinfo_get_data_size",    3,      V_ERRNO },
    81     [SYS_SYSINFO_GET_DATA] = { "sysinfo_get_data",              5,      V_ERRNO },
     78        [SYS_SYSINFO_GET_VAL_TYPE] = { "sysinfo_get_val_type", 2, V_INTEGER },
     79        [SYS_SYSINFO_GET_VALUE] = { "sysinfo_get_value", 3, V_ERRNO },
     80        [SYS_SYSINFO_GET_DATA_SIZE] = { "sysinfo_get_data_size", 3, V_ERRNO },
     81        [SYS_SYSINFO_GET_DATA] = { "sysinfo_get_data", 5, V_ERRNO },
    8282
    83     [SYS_DEBUG_CONSOLE] = { "debug_console", 0, V_ERRNO },
    84     [SYS_IPC_CONNECT_KBOX] = { "ipc_connect_kbox",      1,      V_ERRNO }
     83        [SYS_DEBUG_CONSOLE] = { "debug_console", 0, V_ERRNO },
     84        [SYS_IPC_CONNECT_KBOX] = { "ipc_connect_kbox", 1, V_ERRNO }
    8585};
    8686
  • uspace/app/vuhid/hids/bootkbd.c

    r4f8772d4 r904b1bc  
    4545        USAGE1(USB_HIDUT_USAGE_GENERIC_DESKTOP_KEYBOARD),
    4646        START_COLLECTION(COLLECTION_APPLICATION),
    47                 STD_USAGE_PAGE(USB_HIDUT_PAGE_KEYBOARD),
    48                 USAGE_MINIMUM1(224),
    49                 USAGE_MAXIMUM1(231),
    50                 LOGICAL_MINIMUM1(0),
    51                 LOGICAL_MAXIMUM1(1),
    52                 REPORT_SIZE1(1),
    53                 REPORT_COUNT1(8),
    54                 /* Modifiers */
    55                 INPUT(IOF_DATA | IOF_VARIABLE | IOF_ABSOLUTE),
    56                 REPORT_COUNT1(1),
    57                 REPORT_SIZE1(8),
    58                 /* Reserved */
    59                 INPUT(IOF_CONSTANT),
    60                 REPORT_COUNT1(5),
    61                 REPORT_SIZE1(1),
    62                 STD_USAGE_PAGE(USB_HIDUT_PAGE_LED),
    63                 USAGE_MINIMUM1(1),
    64                 USAGE_MAXIMUM1(5),
    65                 /* LED states */
    66                 OUTPUT(IOF_DATA | IOF_VARIABLE | IOF_ABSOLUTE),
    67                 REPORT_COUNT1(1),
    68                 REPORT_SIZE1(3),
    69                 /* LED states padding */
    70                 OUTPUT(IOF_CONSTANT),
    71                 REPORT_COUNT1(6),
    72                 REPORT_SIZE1(8),
    73                 LOGICAL_MINIMUM1(0),
    74                 LOGICAL_MAXIMUM1(101),
    75                 STD_USAGE_PAGE(USB_HIDUT_PAGE_KEYBOARD),
    76                 USAGE_MINIMUM1(0),
    77                 USAGE_MAXIMUM1(101),
    78                 /* Key array */
    79                 INPUT(IOF_DATA | IOF_ARRAY),
     47
     48        STD_USAGE_PAGE(USB_HIDUT_PAGE_KEYBOARD),
     49        USAGE_MINIMUM1(224),
     50        USAGE_MAXIMUM1(231),
     51        LOGICAL_MINIMUM1(0),
     52        LOGICAL_MAXIMUM1(1),
     53        REPORT_SIZE1(1),
     54        REPORT_COUNT1(8),
     55        /* Modifiers */
     56        INPUT(IOF_DATA | IOF_VARIABLE | IOF_ABSOLUTE),
     57        REPORT_COUNT1(1),
     58        REPORT_SIZE1(8),
     59        /* Reserved */
     60        INPUT(IOF_CONSTANT),
     61        REPORT_COUNT1(5),
     62        REPORT_SIZE1(1),
     63        STD_USAGE_PAGE(USB_HIDUT_PAGE_LED),
     64        USAGE_MINIMUM1(1),
     65        USAGE_MAXIMUM1(5),
     66        /* LED states */
     67        OUTPUT(IOF_DATA | IOF_VARIABLE | IOF_ABSOLUTE),
     68        REPORT_COUNT1(1),
     69        REPORT_SIZE1(3),
     70        /* LED states padding */
     71        OUTPUT(IOF_CONSTANT),
     72        REPORT_COUNT1(6),
     73        REPORT_SIZE1(8),
     74        LOGICAL_MINIMUM1(0),
     75        LOGICAL_MAXIMUM1(101),
     76        STD_USAGE_PAGE(USB_HIDUT_PAGE_KEYBOARD),
     77        USAGE_MINIMUM1(0),
     78        USAGE_MAXIMUM1(101),
     79        /* Key array */
     80        INPUT(IOF_DATA | IOF_ARRAY),
     81
    8082        END_COLLECTION()
    8183};
     
    8486
    8587static uint8_t in_data[] = {
    86              0, 0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    87              0, 0, 0x39, 0x00, 0x00, 0x00, 0x00, 0x00, // Caps Lock
    88              0, 0, 0x53, 0x00, 0x00, 0x00, 0x00, 0x00, // Num Lock
    89              0, 0, 0x39, 0x00, 0x00, 0x00, 0x00, 0x00, // Caps Lock
     88        0,      0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
     89        0,      0, 0x39, 0x00, 0x00, 0x00, 0x00, 0x00, // Caps Lock
     90        0,      0, 0x53, 0x00, 0x00, 0x00, 0x00, 0x00, // Num Lock
     91        0,      0, 0x39, 0x00, 0x00, 0x00, 0x00, 0x00, // Caps Lock
    9092        1 << 2, 0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    9193        1 << 2, 0, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00,
    9294        1 << 2, 0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
    93              0, 0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
     95        0,      0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
    9496};
    9597static vuhid_interface_life_t boot_life = {
    9698        .data_in = in_data,
    97         .data_in_count = sizeof(in_data)/INPUT_SIZE,
     99        .data_in_count = sizeof(in_data) / INPUT_SIZE,
    98100        .data_in_pos_change_delay = 500,
    99101        .msg_born = "Boot keyboard comes to life...",
  • uspace/doc/doxygroups.h

    r4f8772d4 r904b1bc  
    77 */
    88
    9         /**
    10          * @defgroup ns Naming Service
    11          * @ingroup srvcs
    12         */
    13 
    14         /**
    15          * @defgroup kbd Keyboard Service
    16          * @ingroup srvcs
    17         */
    18 
    19         /**
    20          * @defgroup fbs Framebuffer Service
    21          * @ingroup srvcs
    22         */
    23 
    24         /**
    25          * @defgroup console Console Service
    26          * @ingroup srvcs
    27         */
    28 
    29         /**
    30          * @defgroup net Networking Stack
    31          * @ingroup srvcs
    32         */
    33 
    34                 /**
    35                  * @defgroup nic Network interface controllers
    36                  * @ingroup net
    37                 */
    38 
    39                         /**
    40                          * @defgroup libnic Base NIC framework library
    41                          * @ingroup nic
    42                         */
    43 
    44                         /**
    45                          * @defgroup nic_drivers Drivers using the NICF
    46                          * @ingroup nic
    47                         */
    48 
    49                 /**
    50                  * @defgroup net_nil Network interface layer
    51                  * @ingroup net
    52                 */
    53 
    54                         /**
    55                          * @defgroup eth Ethernet (IEEE 802.3) network interface layer Service
    56                          * @ingroup net_nil
    57                         */
    58 
    59                         /**
    60                          * @defgroup nildummy Dummy network interface layer Service
    61                          * @ingroup net_nil
    62                         */
    63 
    64                 /**
    65                  * @defgroup net_il Inter-networking layer
    66                  * @ingroup net
    67                 */
    68 
    69                         /**
    70                          * @defgroup arp Address Resolution Protocol (ARP) Service
    71                          * @ingroup net_il
    72                         */
    73 
    74                         /**
    75                          * @defgroup ip Internet Protocol (IP) Service
    76                          * @ingroup net_il
    77                         */
    78 
    79                 /**
    80                  * @defgroup net_tl Transport layer
    81                  * @ingroup net
    82                 */
    83 
    84                         /**
    85                          * @defgroup icmp Internet Control Message Protocol (ICMP) Service
    86                          * @ingroup net_tl
    87                         */
    88 
    89                         /**
    90                          * @defgroup udp User Datagram Protocol (UDP) Service
    91                          * @ingroup net_tl
    92                         */
    93 
    94                         /**
    95                          * @defgroup tcp Transmission Control Protocol (TCP) Service
    96                          * @ingroup net_tl
    97                         */
    98 
    99                 /**
    100                  * @defgroup packet Packet management system
    101                  * @ingroup net
    102                 */
    103 
    104                 /**
    105                  * @defgroup net_app Applications
    106                  * @ingroup net
    107                 */
    108 
    109                         /**
    110                          * @defgroup echo Echo Service
    111                          * @ingroup net_app
    112                         */
    113 
    114                         /**
    115                          * @defgroup ping Ping
    116                          * @ingroup net_app
    117                         */
    118 
    119                         /**
    120                          * @defgroup nettest Networking tests
    121                          * @ingroup net_app
    122                         */
    123 
    124                 /**
    125                  * @defgroup net_lib Application library
    126                  * @ingroup net
    127                 */
    128 
    129                         /**
    130                          * @defgroup socket Sockets
    131                          * @ingroup net_lib
    132                         */
    133 
    134                         /**
    135                          * @defgroup netdb Netdb
    136                          * @ingroup net_lib
    137                         */
    138 
    139         /**
    140          * @cond amd64
    141          * @defgroup pci PCI Service
    142          * @ingroup srvcs
    143          * @endcond
    144         */
    145 
    146         /**
    147          * @cond ia32
    148          * @defgroup pci PCI Service
    149          * @ingroup srvcs
    150          * @endcond
    151         */
     9/**
     10 *    @defgroup ns Naming Service
     11 *    @ingroup srvcs
     12 */
     13
     14/**
     15 *    @defgroup kbd Keyboard Service
     16 *    @ingroup srvcs
     17 */
     18
     19/**
     20 *    @defgroup fbs Framebuffer Service
     21 *    @ingroup srvcs
     22 */
     23
     24/**
     25 *    @defgroup console Console Service
     26 *    @ingroup srvcs
     27 */
     28
     29/**
     30 *    @defgroup net Networking Stack
     31 *    @ingroup srvcs
     32 */
     33
     34/**
     35 *        @defgroup nic Network interface controllers
     36 *        @ingroup net
     37 */
     38
     39/**
     40 *            @defgroup libnic Base NIC framework library
     41 *            @ingroup nic
     42 */
     43
     44/**
     45 *            @defgroup nic_drivers Drivers using the NICF
     46 *            @ingroup nic
     47 */
     48
     49/**
     50 *        @defgroup net_nil Network interface layer
     51 *        @ingroup net
     52 */
     53
     54/**
     55 *            @defgroup eth Ethernet (IEEE 802.3) network interface layer Service
     56 *            @ingroup net_nil
     57 */
     58
     59/**
     60 *            @defgroup nildummy Dummy network interface layer Service
     61 *            @ingroup net_nil
     62 */
     63
     64/**
     65 *        @defgroup net_il Inter-networking layer
     66 *        @ingroup net
     67 */
     68
     69/**
     70 *            @defgroup arp Address Resolution Protocol (ARP) Service
     71 *            @ingroup net_il
     72 */
     73
     74/**
     75 *            @defgroup ip Internet Protocol (IP) Service
     76 *            @ingroup net_il
     77 */
     78
     79/**
     80 *        @defgroup net_tl Transport layer
     81 *        @ingroup net
     82 */
     83
     84/**
     85 *            @defgroup icmp Internet Control Message Protocol (ICMP) Service
     86 *            @ingroup net_tl
     87 */
     88
     89/**
     90 *            @defgroup udp User Datagram Protocol (UDP) Service
     91 *            @ingroup net_tl
     92 */
     93
     94/**
     95 *            @defgroup tcp Transmission Control Protocol (TCP) Service
     96 *            @ingroup net_tl
     97 */
     98
     99/**
     100 *        @defgroup packet Packet management system
     101 *        @ingroup net
     102 */
     103
     104/**
     105 *        @defgroup net_app Applications
     106 *        @ingroup net
     107 */
     108
     109/**
     110 *            @defgroup echo Echo Service
     111 *            @ingroup net_app
     112 */
     113
     114/**
     115 *            @defgroup ping Ping
     116 *            @ingroup net_app
     117 */
     118
     119/**
     120 *            @defgroup nettest Networking tests
     121 *            @ingroup net_app
     122 */
     123
     124/**
     125 *        @defgroup net_lib Application library
     126 *        @ingroup net
     127 */
     128
     129/**
     130 *            @defgroup socket Sockets
     131 *            @ingroup net_lib
     132 */
     133
     134/**
     135 *            @defgroup netdb Netdb
     136 *            @ingroup net_lib
     137 */
     138
     139/**
     140 *    @cond amd64
     141 *    @defgroup pci PCI Service
     142 *    @ingroup srvcs
     143 *    @endcond
     144 */
     145
     146/**
     147 *    @cond ia32
     148 *    @defgroup pci PCI Service
     149 *    @ingroup srvcs
     150 *    @endcond
     151 */
    152152
    153153/**
     
    156156 */
    157157
    158         /**
    159          * @defgroup sfl Softloat
    160          * @ingroup emul
    161         */
    162 
    163         /**
    164          * @defgroup softint Softint
    165          * @ingroup emul
    166         */
     158/**
     159 *    @defgroup sfl Softloat
     160 *    @ingroup emul
     161 */
     162
     163/**
     164 *    @defgroup softint Softint
     165 *    @ingroup emul
     166 */
    167167
    168168/**
     
    171171 * @brief USB support for HelenOS.
    172172 */
    173         /**
    174          * @defgroup libusb Base USB library
    175          * @ingroup usb
    176          * @brief Common definitions for any driver or application
    177          * dealing with USB.
    178          */
    179 
    180         /**
    181          * @defgroup libusbdev USB library for device drivers
    182          * @ingroup usb
    183          * @brief Library for writing drivers of endpoint devices (functions).
    184          */
    185 
    186         /**
    187          * @defgroup libusbhost USB library for host controller drivers
    188          * @ingroup usb
    189          * @brief Library for writing host controller drivers.
    190          */
    191 
    192         /**
    193          * @defgroup libusbhid USB library for HID devices
    194          * @ingroup usb
    195          * @brief Library for writing USB HID drivers.
    196          */
    197 
    198         /**
    199          * @defgroup usbvirt USB virtualization
    200          * @ingroup usb
    201          * @brief Support for virtual USB devices.
    202          */
    203 
    204                 /**
    205                  * @defgroup libusbvirt USB virtualization library
    206                  * @ingroup usbvirt
    207                  * @brief Library for creating virtual USB devices.
    208                  */
    209 
    210                 /**
    211                  * @defgroup drvusbvhc Virtual USB host controller
    212                  * @ingroup usbvirt
    213                  * @brief Driver simulating work of USB host controller.
    214                  */
    215 
    216                 /**
    217                  * @defgroup usbvirthub Virtual USB hub
    218                  * @ingroup usbvirt
    219                  * @brief Extra virtual USB hub for virtual host controller.
    220                  * @details
    221                  * Some of the sources are shared with virtual host controller,
    222                  * see @ref drvusbvhc for the rest of the files.
    223                  */
    224 
    225                 /**
    226                  * @defgroup usbvirtkbd Virtual USB keybaord
    227                  * @ingroup usbvirt
    228                  * @brief Virtual USB keyboard for virtual host controller.
    229                  */
    230 
    231         /**
    232          * @defgroup usbinfo USB info application
    233          * @ingroup usb
    234          * @brief Application for querying USB devices.
    235          * @details
    236          * The intended usage of this application is to query new USB devices
    237          * for their descriptors etc. to simplify driver writing.
    238          */
    239 
    240         /**
    241          * @defgroup lsusb HelenOS version of lsusb command
    242          * @ingroup usb
    243          * @brief Application for listing USB host controllers.
    244          * @details
    245          * List all found host controllers.
    246          */
    247 
    248         /**
    249          * @defgroup drvusbmid USB multi interface device driver
    250          * @ingroup usb
    251          * @brief USB multi interface device driver
    252          * @details
    253          * This driver serves as a mini hub (or bus) driver for devices
    254          * that have the class defined at interface level (those devices
    255          * usually have several interfaces).
    256          *
    257          * The term multi interface device driver (MID) was borrowed
    258          * Solaris operating system.
    259          */
    260 
    261         /**
    262          * @defgroup drvusbhub USB hub driver
    263          * @ingroup usb
    264          * @brief USB hub driver.
    265          */
    266 
    267         /**
    268          * @defgroup drvusbhid USB HID driver
    269          * @ingroup usb
    270          * @brief USB driver for HID devices.
    271          */
    272 
    273         /**
    274          * @defgroup drvusbmast USB mass storage driver
    275          * @ingroup usb
    276          * @brief USB driver for mass storage devices (bulk-only protocol).
    277          * This driver is a only a stub and is currently used only for
    278          * testing that bulk transfers work.
    279          */
    280 
    281         /**
    282          * @defgroup drvusbuhci UHCI driver
    283          * @ingroup usb
    284          * @brief Drivers for USB UHCI host controller and root hub.
    285          */
    286 
    287         /**
    288          * @defgroup drvusbohci OHCI driver
    289          * @ingroup usb
    290          * @brief Driver for OHCI host controller.
    291          */
    292 
    293         /**
    294          * @defgroup drvusbehci EHCI driver
    295          * @ingroup usb
    296          * @brief Driver for EHCI host controller.
    297          */
    298 
    299         /**
    300          * @defgroup drvusbfallback USB fallback driver
    301          * @ingroup usb
    302          * @brief Fallback driver for any USB device.
    303          * @details
    304          * The purpose of this driver is to simplify querying of unknown
    305          * devices from within HelenOS (without a driver, no node at all
    306          * may appear under /loc/devices).
    307          */
    308 
    309 
     173/**
     174 *     @defgroup libusb Base USB library
     175 *     @ingroup usb
     176 *     @brief Common definitions for any driver or application
     177 *     dealing with USB.
     178 */
     179
     180/**
     181 *     @defgroup libusbdev USB library for device drivers
     182 *     @ingroup usb
     183 *     @brief Library for writing drivers of endpoint devices (functions).
     184 */
     185
     186/**
     187 *     @defgroup libusbhost USB library for host controller drivers
     188 *     @ingroup usb
     189 *     @brief Library for writing host controller drivers.
     190 */
     191
     192/**
     193 *     @defgroup libusbhid USB library for HID devices
     194 *     @ingroup usb
     195 *     @brief Library for writing USB HID drivers.
     196 */
     197
     198/**
     199 *     @defgroup usbvirt USB virtualization
     200 *     @ingroup usb
     201 *     @brief Support for virtual USB devices.
     202 */
     203
     204/**
     205 *         @defgroup libusbvirt USB virtualization library
     206 *         @ingroup usbvirt
     207 *         @brief Library for creating virtual USB devices.
     208 */
     209
     210/**
     211 *         @defgroup drvusbvhc Virtual USB host controller
     212 *         @ingroup usbvirt
     213 *         @brief Driver simulating work of USB host controller.
     214 */
     215
     216/**
     217 *         @defgroup usbvirthub Virtual USB hub
     218 *         @ingroup usbvirt
     219 *         @brief Extra virtual USB hub for virtual host controller.
     220 *         @details
     221 *         Some of the sources are shared with virtual host controller,
     222 *         see @ref drvusbvhc for the rest of the files.
     223 */
     224
     225/**
     226 *         @defgroup usbvirtkbd Virtual USB keybaord
     227 *         @ingroup usbvirt
     228 *         @brief Virtual USB keyboard for virtual host controller.
     229 */
     230
     231/**
     232 *     @defgroup usbinfo USB info application
     233 *     @ingroup usb
     234 *     @brief Application for querying USB devices.
     235 *     @details
     236 *     The intended usage of this application is to query new USB devices
     237 *     for their descriptors etc. to simplify driver writing.
     238 */
     239
     240/**
     241 *     @defgroup lsusb HelenOS version of lsusb command
     242 *     @ingroup usb
     243 *     @brief Application for listing USB host controllers.
     244 *     @details
     245 *     List all found host controllers.
     246 */
     247
     248/**
     249 *     @defgroup drvusbmid USB multi interface device driver
     250 *     @ingroup usb
     251 *     @brief USB multi interface device driver
     252 *     @details
     253 *     This driver serves as a mini hub (or bus) driver for devices
     254 *     that have the class defined at interface level (those devices
     255 *     usually have several interfaces).
     256 *
     257 *     The term multi interface device driver (MID) was borrowed
     258 *     Solaris operating system.
     259 */
     260
     261/**
     262 *     @defgroup drvusbhub USB hub driver
     263 *     @ingroup usb
     264 *     @brief USB hub driver.
     265 */
     266
     267/**
     268 *     @defgroup drvusbhid USB HID driver
     269 *     @ingroup usb
     270 *     @brief USB driver for HID devices.
     271 */
     272
     273/**
     274 *     @defgroup drvusbmast USB mass storage driver
     275 *     @ingroup usb
     276 *     @brief USB driver for mass storage devices (bulk-only protocol).
     277 *     This driver is a only a stub and is currently used only for
     278 *     testing that bulk transfers work.
     279 */
     280
     281/**
     282 *     @defgroup drvusbuhci UHCI driver
     283 *     @ingroup usb
     284 *     @brief Drivers for USB UHCI host controller and root hub.
     285 */
     286
     287/**
     288 *     @defgroup drvusbohci OHCI driver
     289 *     @ingroup usb
     290 *     @brief Driver for OHCI host controller.
     291 */
     292
     293/**
     294 *     @defgroup drvusbehci EHCI driver
     295 *     @ingroup usb
     296 *     @brief Driver for EHCI host controller.
     297 */
     298
     299/**
     300 *     @defgroup drvusbfallback USB fallback driver
     301 *     @ingroup usb
     302 *     @brief Fallback driver for any USB device.
     303 *     @details
     304 *     The purpose of this driver is to simplify querying of unknown
     305 *     devices from within HelenOS (without a driver, no node at all
     306 *     may appear under /loc/devices).
     307 */
  • uspace/doc/main_page.h

    r4f8772d4 r904b1bc  
    11/**
    2  @mainpage HelenOS Operating System Source Code Reference
    3 
    4 HelenOS is a portable microkernel-based multiserver operating system designed and implemented from scratch. It decomposes key operating system functionality such as file systems, networking, device drivers and graphical user interface into a collection of fine-grained user space components that interact with each other via message passing. A failure or crash of one component does not directly harm others. HelenOS is therefore flexible, modular, extensible, fault tolerant and easy to understand.
    5 
    6 HelenOS does not aim to be a clone of any existing operating system and trades compatibility with legacy APIs for cleaner design. Most of HelenOS components have been made to order specifically for HelenOS so that its essential parts can stay free of adaptation layers, glue code, franken-components and the maintenance burden incurred by them.
    7 
    8 HelenOS runs on seven different processor architectures and machines ranging from embedded ARM devices and single-board computers through multicore 32-bit and 64-bit desktop PCs to 64-bit Itanium and SPARC rack-mount servers.
    9 
    10 HelenOS is open source, free software. Its source code is available under the BSD license. Some third-party components are licensed under GPL.
    11 
    12 */
     2 * @mainpage HelenOS Operating System Source Code Reference
     3 *
     4 * HelenOS is a portable microkernel-based multiserver operating system designed and implemented from scratch. It decomposes key operating system functionality such as file systems, networking, device drivers and graphical user interface into a collection of fine-grained user space components that interact with each other via message passing. A failure or crash of one component does not directly harm others. HelenOS is therefore flexible, modular, extensible, fault tolerant and easy to understand.
     5 *
     6 * HelenOS does not aim to be a clone of any existing operating system and trades compatibility with legacy APIs for cleaner design. Most of HelenOS components have been made to order specifically for HelenOS so that its essential parts can stay free of adaptation layers, glue code, franken-components and the maintenance burden incurred by them.
     7 *
     8 * HelenOS runs on seven different processor architectures and machines ranging from embedded ARM devices and single-board computers through multicore 32-bit and 64-bit desktop PCs to 64-bit Itanium and SPARC rack-mount servers.
     9 *
     10 * HelenOS is open source, free software. Its source code is available under the BSD license. Some third-party components are licensed under GPL.
     11 *
     12 */
  • uspace/drv/audio/sb16/dsp_commands.h

    r4f8772d4 r904b1bc  
    3838/** See Sound Blaster Series HW programming Guide Chapter 6. */
    3939typedef enum dsp_command {
    40         DIRECT_8B_OUTPUT = 0x10, /* Followed by unsigned byte of digital data,
    41                                   * software controls sampling rate */
    42         DIRECT_8B_INPUT = 0x20,  /* Same as DIRECT_8B_OUTPUT but for input */
    43 
    44         TRANSFER_TIME_CONSTANT = 0x40, /* Followed by time constant.
    45                                         * TC = 65536 - (256 000 000 /
    46                                         *   (channels * sampling rate))
    47                                         * Send only high byte */
    48 
    49         SINGLE_DMA_8B_OUTPUT = 0x14, /* Followed by length.high and length.low
    50                                       * starts single-cycle DMA, length is -1 */
    51         SINGLE_DMA_8B_INPUT = 0x24,  /* Same as SINGLE_DMA_8B_OUTPUT, but for
    52                                       * input */
    53         SINGLE_DMA_8B_ADPCM_2B_OUT = 0x16, /* Starts single-cycle DMA using
    54                                             * Creative ADPSM 8->2 bit compressed
    55                                             * data, Followed by length.low
    56                                             * and length.high. Length is -1 */
    57         SINGLE_DMA_8B_ADPCM_2B_OUT_REF = 0x17, /* Starts single-cycle DMA using
    58                                                 * DPSM 8->2 bit compressed data
    59                                                 * with reference byte.
    60                                                 * Followed by length.low and
    61                                                 * length.high. Length is -1 */
    62         SINGLE_DMA_8B_ADPCM_4B_OUT = 0x74, /* Same as
    63                                             * SINGLE_DMA_8B_ADPCM_2B_OUT */
    64         SINGLE_DMA_8B_ADPCM_4B_OUT_REF = 0x75, /* Same as
    65                                                 * SINGLE_DMA_8B_ADPCM_2B_OUT_REF
    66                                                 */
    67         SINGLE_DMA_8B_ADPCM_3B_OUT = 0x76, /* Same as
    68                                             * SINGLE_DMA_8B_ADPCM_2B_OUT */
    69         SINGLE_DMA_8B_ADPCM_3B_OUT_REF = 0x77, /* Same as
    70                                                 * SINGLE_DMA_8B_ADPCM_2B_OUT_REF
    71                                                 */
    72 
    73         DMA_8B_PAUSE = 0xd0, /* Stop sending DMA request,
    74                               * works for SINGLE and AUTO */
    75         DMA_8B_CONTINUE = 0xd4, /* Resume transfers paused by DMA_8B_PAUSE */
    76 
    77         SPEAKER_ON = 0xd1,  /* Connect speaker via internal amplifier,
    78                              * has no effect on 4.xx */
    79         SPEAKER_OFF = 0xd3, /* Disconnect output from the amplifier,
    80                              * has no effect on 4.xx */
    81 
    82         MIDI_POLLING = 0x30, /* Read DSP for MIDI data */
    83         MIDI_INTERRUPT = 0x31, /* Start interrupt mode, interrupt will be
    84                                 * generated when there is in-bound data.
    85                                 * To exit send again */
    86         MIDI_OUTPUT = 0x38, /* Followed by midi_data */
    87 
    88         PAUSE = 0x80, /* Followed by duration.low, duration.high. Duration is -1
    89                        * In the units of sampling period. Generates interrupt
    90                        * at the end of period */
    91         DSP_VERSION = 0xe1, /* Read 2 bytes, major and minor number */
    92 
    93         AUTO_DMA_8B_OUTPUT = 0x1c, /* Starts auto-init DMA mode using 8-bit
    94                                     * Interrupt after every block.
    95                                     * To terminate, switch to single or use
    96                                     * EXIT command*/
    97         AUTO_DMA_8B_INPUT = 0x2c, /* Same as AUTO_DMA_8B_OUTPUT, but for input*/
    98         AUTO_DMA_8B_ADPCM_2B_REF = 0x1f, /* Same as AUTO_DMA_8B_OUTPUT, but use
    99                                           * 8->2bit ADPCM audio format */
    100         AUTO_DMA_8B_ADPCM_4B_REF = 0x7d, /* Same as AUTO_DMA_8B_ADPCM_2B_REF */
    101         AUTO_DMA_8B_ADPCM_3B_REF = 0x7f, /* Same as AUTO_DMA_8B_ADPCM_2B_REF */
    102 
    103         DMA_8B_EXIT = 0xda, /* Ends DMA transfer and terminates I/O process */
    104 
    105         BLOCK_TRANSFER_SIZE = 0x48, /* Followed by size.low, size.high
    106                                      * Used with HIGH_SPEED AUTO_DMA */
    107 
    108         UART_MIDI_POLLING = 0x34, /* Start UART MIDI polling mode, read and
    109                                    * write from/to DSP is interpreted as
    110                                    * read/write from/to MIDI.
    111                                    * To exit use reset signal. Note that reset
    112                                    * will restore previous state and won't do
    113                                    * complete reset */
    114         UART_MIDI_INTERRUPT = 0x35, /* Same as UART_MIDI_POLLING, but use
    115                                      * interrupts instead of polling. */
    116         UART_MIDI_POLLING_TS = 0x36, /* Add time stamp to inbound data, the
    117                                       * order is time.low time.mid time.high
    118                                       * data */
    119         UART_MIDI_INTERRUPT_TS = 0x37, /* Same as UART_MIDI_POLLING_TS, but use
    120                                         * interrupts instead of polling */
    121 
    122         SPEAKER_STATUS = 0xd8, /* 0xff means amp is on, 0x00 means it's off */
    123 
    124         AUTO_DMA_8B_HIGH_OUTPUT = 0x90, /* DSP will generate interrupt after
    125                                          * every block. No other commands are
    126                                          * accepted in this mode. To exit
    127                                          * the mode send RESET command.
    128                                          * Note that reset will restore
    129                                          * previous state. */
    130         AUTO_DMA_8B_HIGH_INPUT = 0x98, /* Same as AUTO_DMA_8B_HIGH_OUTPUT */
    131         SINGLE_DMA_8B_HIGH_OUTPUT = 0x91, /* Transfer one block and exit,
    132                                            * generates interrupt */
    133         SINGLE_DMA_8B_HIGH_INPUT = 0x99, /* Same as SINGLE_DMA_8B_HIGH_OUTPUT */
    134 
    135         SET_MONO_INPUT = 0xa0, /* Mono mode is the default, only on 3.xx */
    136         SET_STEREO_INPUT = 0xa8, /* Switch to stereo recording, only on 3.xx */
    137 
    138         SET_SAMPLING_RATE_OUTPUT = 0x41, /* Followed by sapling rate
    139                                           * 5000 to 45000 Hz, inclusive */
    140         SET_SAMPLING_RATE_INPUT = 0x42, /* Same as SET_SAMPLING_RATE_OUTPUT */
    141 
    142         SINGLE_DMA_16B_DA = 0xb0,     /* Followed by mode, size.low, size.high*/
    143         SINGLE_DMA_16B_DA_FIFO = 0xb2,/* mode format is:                      */
    144         AUTO_DMA_16B_DA = 0xb4,       /*    0x00 - unsigned mono              */
    145         AUTO_DMA_16B_DA_FIFO = 0xb6,  /*    0x10 - signed mono                */
    146         SINGLE_DMA_16B_AD = 0xb8,     /*    0x20 - unsigned stereo            */
    147         SINGLE_DMA_16B_AD_FIFO = 0xba,/*    0x30 - signed stereo              */
    148         AUTO_DMA_16B_AD = 0xbc,       /* Size is -1. Terminate by EXIT        */
    149         AUTO_DMA_16B_AD_FIFO = 0xbe,  /* or switch to SINGLE_DMA              */
    150 
    151         SINGLE_DMA_8B_DA = 0xc0,     /* Followed by mode, size.low, size.high */
    152         SINGLE_DMA_8B_DA_FIFO = 0xc2,/* mode format is:                       */
    153         AUTO_DMA_8B_DA = 0xc4,       /*    0x00 - unsigned mono               */
    154         AUTO_DMA_8B_DA_FIFO = 0xc6,  /*    0x10 - signed mono                 */
    155         SINGLE_DMA_8B_AD = 0xc8,     /*    0x20 - unsigned stereo             */
    156         SINGLE_DMA_8B_AD_FIFO = 0xca,/*    0x30 - signed stereo               */
    157         AUTO_DMA_8B_AD = 0xcc,       /* Size is -1. Terminate by EXIT         */
    158         AUTO_DMA_8B_AD_FIFO = 0xce,  /* or switch to SINGLE_DMA               */
    159 
    160         DMA_16B_PAUSE = 0xd5,/* Stop sending DMA request, both SINGLE and AUTO*/
    161         DMA_16B_CONTINUE = 0xd6, /* Resume requests paused by DMA_16B_PAUSE */
    162         DMA_16B_EXIT = 0xd9, /* Ends DMA transfer and terminates I/O process */
     40        /*
     41         * Followed by unsigned byte of digital data,
     42         * software controls sampling rate
     43         */
     44        DIRECT_8B_OUTPUT = 0x10,
     45        /* Same as DIRECT_8B_OUTPUT but for input */
     46        DIRECT_8B_INPUT = 0x20,
     47
     48        /*
     49         * Followed by time constant.
     50         * TC = 65536 - (256 000 000 /
     51         *   (channels * sampling rate))
     52         * Send only high byte
     53         */
     54        TRANSFER_TIME_CONSTANT = 0x40,
     55
     56        /*
     57         * Followed by length.high and length.low
     58         * starts single-cycle DMA, length is -1
     59         */
     60        SINGLE_DMA_8B_OUTPUT = 0x14,
     61        /*
     62         * Same as SINGLE_DMA_8B_OUTPUT, but for
     63         * input
     64         */
     65        SINGLE_DMA_8B_INPUT = 0x24,
     66        /*
     67         * Starts single-cycle DMA using
     68         * Creative ADPSM 8->2 bit compressed
     69         * data, Followed by length.low
     70         * and length.high. Length is -1
     71         */
     72        SINGLE_DMA_8B_ADPCM_2B_OUT = 0x16,
     73        /*
     74         * Starts single-cycle DMA using
     75         * DPSM 8->2 bit compressed data
     76         * with reference byte.
     77         * Followed by length.low and
     78         * length.high. Length is -1
     79         */
     80        SINGLE_DMA_8B_ADPCM_2B_OUT_REF = 0x17,
     81        /*
     82         * Same as
     83         * SINGLE_DMA_8B_ADPCM_2B_OUT
     84         */
     85        SINGLE_DMA_8B_ADPCM_4B_OUT = 0x74,
     86        /*
     87         * Same as
     88         * SINGLE_DMA_8B_ADPCM_2B_OUT_REF
     89         */
     90        SINGLE_DMA_8B_ADPCM_4B_OUT_REF = 0x75,
     91        /*
     92         * Same as
     93         * SINGLE_DMA_8B_ADPCM_2B_OUT
     94         */
     95        SINGLE_DMA_8B_ADPCM_3B_OUT = 0x76,
     96        /*
     97         * Same as
     98         * SINGLE_DMA_8B_ADPCM_2B_OUT_REF
     99         */
     100        SINGLE_DMA_8B_ADPCM_3B_OUT_REF = 0x77,
     101        /*
     102         * Stop sending DMA request,
     103         * works for SINGLE and AUTO
     104         */
     105        DMA_8B_PAUSE = 0xd0,
     106        /* Resume transfers paused by DMA_8B_PAUSE */
     107        DMA_8B_CONTINUE = 0xd4,
     108
     109        /*
     110         * Connect speaker via internal amplifier,
     111         * has no effect on 4.xx
     112         */
     113        SPEAKER_ON = 0xd1,
     114        /*
     115         * Disconnect output from the amplifier,
     116         * has no effect on 4.xx
     117         */
     118        SPEAKER_OFF = 0xd3,
     119
     120        /* Read DSP for MIDI data */
     121        MIDI_POLLING = 0x30,
     122        /*
     123         * Start interrupt mode, interrupt will be
     124         * generated when there is in-bound data.
     125         * To exit send again
     126         */
     127        MIDI_INTERRUPT = 0x31,
     128        /* Followed by midi_data */
     129        MIDI_OUTPUT = 0x38,
     130
     131        /*
     132         * Followed by duration.low, duration.high. Duration is -1
     133         * In the units of sampling period. Generates interrupt
     134         * at the end of period
     135         */
     136        PAUSE = 0x80,
     137        /* Read 2 bytes, major and minor number */
     138        DSP_VERSION = 0xe1,
     139
     140        /*
     141         * Starts auto-init DMA mode using 8-bit
     142         * Interrupt after every block.
     143         * To terminate, switch to single or use
     144         * EXIT command
     145         */
     146        AUTO_DMA_8B_OUTPUT = 0x1c,
     147        /* Same as AUTO_DMA_8B_OUTPUT, but for input */
     148        AUTO_DMA_8B_INPUT = 0x2c,
     149        /*
     150         * Same as AUTO_DMA_8B_OUTPUT, but use
     151         * 8->2bit ADPCM audio format
     152         */
     153        AUTO_DMA_8B_ADPCM_2B_REF = 0x1f,
     154        /* Same as AUTO_DMA_8B_ADPCM_2B_REF */
     155        AUTO_DMA_8B_ADPCM_4B_REF = 0x7d,
     156        /* Same as AUTO_DMA_8B_ADPCM_2B_REF */
     157        AUTO_DMA_8B_ADPCM_3B_REF = 0x7f,
     158
     159        /* Ends DMA transfer and terminates I/O process */
     160        DMA_8B_EXIT = 0xda,
     161
     162        /*
     163         * Followed by size.low, size.high
     164         * Used with HIGH_SPEED AUTO_DMA
     165         */
     166        BLOCK_TRANSFER_SIZE = 0x48,
     167        /*
     168         * Start UART MIDI polling mode, read and
     169         * write from/to DSP is interpreted as
     170         * read/write from/to MIDI.
     171         * To exit use reset signal. Note that reset
     172         * will restore previous state and won't do
     173         * complete reset
     174         */
     175        UART_MIDI_POLLING = 0x34,
     176        /*
     177         * Same as UART_MIDI_POLLING, but use
     178         * interrupts instead of polling.
     179         */
     180        UART_MIDI_INTERRUPT = 0x35,
     181        /*
     182         * Add time stamp to inbound data, the
     183         * order is time.low time.mid time.high
     184         * data
     185         */
     186        UART_MIDI_POLLING_TS = 0x36,
     187        /*
     188         * Same as UART_MIDI_POLLING_TS, but use
     189         * interrupts instead of polling
     190         */
     191        UART_MIDI_INTERRUPT_TS = 0x37,
     192
     193        /* 0xff means amp is on, 0x00 means it's off */
     194        SPEAKER_STATUS = 0xd8,
     195
     196        /*
     197         * DSP will generate interrupt after
     198         * every block. No other commands are
     199         * accepted in this mode. To exit
     200         * the mode send RESET command.
     201         * Note that reset will restore
     202         * previous state.
     203         */
     204        AUTO_DMA_8B_HIGH_OUTPUT = 0x90,
     205        /* Same as AUTO_DMA_8B_HIGH_OUTPUT */
     206        AUTO_DMA_8B_HIGH_INPUT = 0x98,
     207        /*
     208         * Transfer one block and exit,
     209         * generates interrupt
     210         */
     211        SINGLE_DMA_8B_HIGH_OUTPUT = 0x91,
     212        /* Same as SINGLE_DMA_8B_HIGH_OUTPUT */
     213        SINGLE_DMA_8B_HIGH_INPUT = 0x99,
     214
     215        /* Mono mode is the default, only on 3.xx */
     216        SET_MONO_INPUT = 0xa0,
     217        /* Switch to stereo recording, only on 3.xx */
     218        SET_STEREO_INPUT = 0xa8,
     219
     220        /*
     221         * Followed by sapling rate
     222         * 5000 to 45000 Hz, inclusive
     223         */
     224        SET_SAMPLING_RATE_OUTPUT = 0x41,
     225        /* Same as SET_SAMPLING_RATE_OUTPUT */
     226        SET_SAMPLING_RATE_INPUT = 0x42,
     227
     228        /*
     229         * Followed by mode, size.low, size.high
     230         * mode format is:
     231         *    0x00 - unsigned mono
     232         *    0x10 - signed mono
     233         *    0x20 - unsigned stereo
     234         *    0x30 - signed stereo
     235         * Size is -1. Terminate AUTO_DMA by EXIT
     236         * or switch to SINGLE_DMA
     237         */
     238        SINGLE_DMA_16B_DA = 0xb0,
     239        SINGLE_DMA_16B_DA_FIFO = 0xb2,
     240        AUTO_DMA_16B_DA = 0xb4,
     241        AUTO_DMA_16B_DA_FIFO = 0xb6,
     242        SINGLE_DMA_16B_AD = 0xb8,
     243        SINGLE_DMA_16B_AD_FIFO = 0xba,
     244        AUTO_DMA_16B_AD = 0xbc,
     245        AUTO_DMA_16B_AD_FIFO = 0xbe,
     246
     247        /*
     248         * Followed by mode, size.low, size.high
     249         * mode format is:
     250         *    0x00 - unsigned mono
     251         *    0x10 - signed mono
     252         *    0x20 - unsigned stereo
     253         *    0x30 - signed stereo
     254         * Size is -1. Terminate AUTO_DMA by EXIT
     255         * or switch to SINGLE_DMA
     256         */
     257        SINGLE_DMA_8B_DA = 0xc0,
     258        SINGLE_DMA_8B_DA_FIFO = 0xc2,
     259        AUTO_DMA_8B_DA = 0xc4,
     260        AUTO_DMA_8B_DA_FIFO = 0xc6,
     261        SINGLE_DMA_8B_AD = 0xc8,
     262        SINGLE_DMA_8B_AD_FIFO = 0xca,
     263        AUTO_DMA_8B_AD = 0xcc,
     264        AUTO_DMA_8B_AD_FIFO = 0xce,
     265
     266        /* Stop sending DMA request, both SINGLE and AUTO */
     267        DMA_16B_PAUSE = 0xd5,
     268        /* Resume requests paused by DMA_16B_PAUSE */
     269        DMA_16B_CONTINUE = 0xd6,
     270        /* Ends DMA transfer and terminates I/O process */
     271        DMA_16B_EXIT = 0xd9,
    163272} dsp_command_t;
    164273
  • uspace/drv/bus/usb/ehci/hw_struct/iso_transfer_descriptor.h

    r4f8772d4 r904b1bc  
    4343
    4444        volatile uint32_t transaction[8];
     45        volatile uint32_t buffer_pointer[7];
     46
     47        /* 64 bit struct only */
     48        volatile uint32_t extended_bp[7];
     49} __attribute__((packed, aligned(32))) itd_t;
     50
     51/*
     52 * itd_t.transaction
     53 */
    4554#define ITD_TRANSACTION_STATUS_ACTIVE_FLAG  (1 << 31)
    4655#define ITD_TRANSACTION_STATUS_BUFFER_ERROR_FLAG  (1 << 30)
     
    5564#define ITD_TRANSACTION_OFFSET_SHIFT   0
    5665
    57         volatile uint32_t buffer_pointer[7];
     66/*
     67 * itd_t.buffer_pointer
     68 */
    5869#define ITD_BUFFER_POINTER_MASK      0xfffff000
    5970/* First buffer pointer */
     
    7081#define ITD_BUFFER_POINTER_MULTI_SHIFT   0
    7182
    72         /* 64 bit struct only */
    73         volatile uint32_t extended_bp[7];
    74 } __attribute__((packed, aligned(32))) itd_t;
    7583#endif
     84
    7685/**
    7786 * @}
  • uspace/drv/bus/usb/ehci/hw_struct/queue_head.h

    r4f8772d4 r904b1bc  
    4949
    5050        volatile uint32_t ep_char;
     51        volatile uint32_t ep_cap;
     52
     53        link_pointer_t current;
     54        /* Transfer overlay starts here */
     55        link_pointer_t next;
     56        link_pointer_t alternate;
     57        volatile uint32_t status;
     58        volatile uint32_t buffer_pointer[5];
     59
     60        /* 64 bit struct only */
     61        volatile uint32_t extended_bp[5];
     62} __attribute__((packed, aligned(32))) qh_t;
     63
     64/*
     65 * qh_t.ep_char
     66 */
    5167#define QH_EP_CHAR_RL_MASK    0xf
    5268#define QH_EP_CHAR_RL_SHIFT   28
     
    7894    (((val) >> QH_EP_CHAR_ADDR_SHIFT) & QH_EP_CHAR_ADDR_MASK)
    7995
    80         volatile uint32_t ep_cap;
     96/*
     97 * qh_t.ep_cap
     98 */
    8199#define QH_EP_CAP_MULTI_MASK   0x3
    82100#define QH_EP_CAP_MULTI_SHIFT  30
     
    100118        (((val) & QH_EP_CAP_S_MASK_MASK) << QH_EP_CAP_S_MASK_SHIFT)
    101119
    102         link_pointer_t current;
    103 /* Transfer overlay starts here */
    104         link_pointer_t next;
    105         link_pointer_t alternate;
     120/*
     121 * qh_t.alternate
     122 */
    106123#define QH_ALTERNATE_NACK_CNT_MASK   0x7
    107124#define QH_ALTERNATE_NACK_CNT_SHIFT  1
    108125
    109         volatile uint32_t status;
     126/*
     127 * qh_t.status
     128 */
    110129#define QH_STATUS_TOGGLE_FLAG   (1 << 31)
    111130#define QH_STATUS_TOTAL_MASK    0x7fff
     
    127146#define QH_STATUS_PING_FLAG     (1 << 0)
    128147
    129         volatile uint32_t buffer_pointer[5];
     148/*
     149 * qh_t.buffer_pointer
     150 */
    130151#define QH_BUFFER_POINTER_MASK   0xfffff000
    131152/* Only the first buffer pointer */
     
    141162#define QH_BUFFER_POINTER_FTAG_SHIFT  0
    142163
    143         /* 64 bit struct only */
    144         volatile uint32_t extended_bp[5];
    145 } __attribute__((packed, aligned(32))) qh_t;
    146164
    147165static inline void qh_append_qh(qh_t *qh, const qh_t *next)
     
    212230}
    213231
    214 
    215 void qh_init(qh_t *instance, const endpoint_t *ep);
     232extern void qh_init(qh_t *instance, const endpoint_t *ep);
     233
    216234#endif
    217235/**
  • uspace/drv/bus/usb/ehci/hw_struct/split_iso_transfer_descriptor.h

    r4f8772d4 r904b1bc  
    4343
    4444        volatile uint32_t ep;
     45        volatile uint32_t uframe;
     46        volatile uint32_t status;
     47        volatile uint32_t buffer_pointer[2];
     48        link_pointer_t back;
     49
     50        /* 64 bit struct only */
     51        volatile uint32_t extended_bp[2];
     52} __attribute__((packed, aligned(32))) sitd_t;
     53
     54/*
     55 * sitd_t.ep
     56 */
    4557#define SITD_EP_IN_FLAG         (1 << 31)
    4658#define SITD_EP_PORT_MASK       0x3f
     
    5365#define SITD_EP_ADDR_SHIFT      0
    5466
    55         volatile uint32_t uframe;
     67/*
     68 * sitd_t.uframe
     69 */
    5670#define SITD_uFRAME_CMASK_MASK    0xff
    5771#define SITD_uFRAME_CMASK_SHIFT   8
     
    5973#define SITD_uFRAME_SMASK_SHIFT   0
    6074
    61         volatile uint32_t status;
     75/*
     76 * sitd_t.status
     77 */
    6278#define SITD_STATUS_IOC_FLAG            (1 << 31)
    6379#define SITD_STATUS_PAGE_FLAG           (1 << 30)
     
    7490#define SITD_STATUS_SPLIT_COMPLETE_FLAG (1 << 1)
    7591
    76         volatile uint32_t buffer_pointer[2];
     92/*
     93 * sitd_t.buffer_pointer
     94 */
    7795#define SITD_BUFFER_POINTER_MASK   0xfffff000
    7896/* Only the first page pointer */
     
    85103#define SITD_BUFFER_POINTER_COUNT_SHIFT   0
    86104
    87         link_pointer_t back;
     105#endif
    88106
    89         /* 64 bit struct only */
    90         volatile uint32_t extended_bp[2];
    91 } __attribute__((packed, aligned(32))) sitd_t;
    92 #endif
    93107/**
    94108 * @}
  • uspace/drv/bus/usb/ehci/hw_struct/transfer_descriptor.h

    r4f8772d4 r904b1bc  
    4747
    4848        volatile uint32_t status;
     49
     50        volatile uint32_t buffer_pointer[5];
     51
     52        /* 64 bit struct only */
     53        volatile uint32_t extended_bp[5];
     54
     55} __attribute__((packed, aligned(32))) td_t;
     56
     57/*
     58 * td_t.status
     59 */
    4960#define TD_STATUS_TOGGLE_FLAG   (1 << 31)
    5061#define TD_STATUS_TOTAL_MASK    0x7fff
     
    6980#define TD_STATUS_PING_FLAG     (1 << 0)
    7081
    71         volatile uint32_t buffer_pointer[5];
     82/*
     83 * td_t.buffer_pointer
     84 */
     85
    7286#define TD_BUFFER_POINTER_MASK   0xfffff000
    7387/* Only the first page pointer */
    7488#define TD_BUFFER_POINTER_OFFSET_MASK    0xfff
    75 
    76         /* 64 bit struct only */
    77         volatile uint32_t extended_bp[5];
    78 
    79 } __attribute__((packed, aligned(32))) td_t;
    8089
    8190static_assert(sizeof(td_t) % 32 == 0);
  • uspace/drv/bus/usb/ohci/ohci_regs.h

    r4f8772d4 r904b1bc  
    5050typedef struct ohci_regs {
    5151        const ioport32_t revision;
    52 #define R_REVISION_MASK (0x3f)
    53 #define R_LEGACY_FLAG   (0x80)
    5452
    5553        ioport32_t control;
    56 /* Control-bulk service ratio */
    57 #define C_CBSR_1_1  (0x0)
    58 #define C_CBSR_1_2  (0x1)
    59 #define C_CBSR_1_3  (0x2)
    60 #define C_CBSR_1_4  (0x3)
    61 #define C_CBSR_MASK (0x3)
    62 #define C_CBSR_SHIFT 0
    63 
    64 #define C_PLE (1 << 2)   /* Periodic list enable */
    65 #define C_IE  (1 << 3)   /* Isochronous enable */
    66 #define C_CLE (1 << 4)   /* Control list enable */
    67 #define C_BLE (1 << 5)   /* Bulk list enable */
    68 
    69 /* Host controller functional state */
    70 #define C_HCFS_RESET       (0x0)
    71 #define C_HCFS_RESUME      (0x1)
    72 #define C_HCFS_OPERATIONAL (0x2)
    73 #define C_HCFS_SUSPEND     (0x3)
    74 #define C_HCFS_GET(reg) ((OHCI_RD(reg) >> 6) & 0x3)
    75 #define C_HCFS_SET(reg, value) \
    76 do { \
    77         uint32_t r = OHCI_RD(reg); \
    78         r &= ~(0x3 << 6); \
    79         r |= (value & 0x3) << 6; \
    80         OHCI_WR(reg, r); \
    81 } while (0)
    82 
    83 #define C_IR  (1 << 8)  /* Interrupt routing, make sure it's 0 */
    84 #define C_RWC (1 << 9)  /* Remote wakeup connected, host specific */
    85 #define C_RWE (1 << 10)  /* Remote wakeup enable */
    8654
    8755        ioport32_t command_status;
    88 #define CS_HCR (1 << 0)   /* Host controller reset */
    89 #define CS_CLF (1 << 1)   /* Control list filled */
    90 #define CS_BLF (1 << 2)   /* Bulk list filled */
    91 #define CS_OCR (1 << 3)   /* Ownership change request */
    92 #if 0
    93 #define CS_SOC_MASK (0x3) /* Scheduling overrun count */
    94 #define CS_SOC_SHIFT (16)
    95 #endif
    9656
    9757        /** Interupt enable/disable/status,
    9858         * reads give the same value,
    9959         * writing causes enable/disable,
    100          * status is write-clean (writing 1 clears the bit*/
     60         * status is write-clean (writing 1 clears the bit
     61         */
    10162        ioport32_t interrupt_status;
    10263        ioport32_t interrupt_enable;
    10364        ioport32_t interrupt_disable;
    104 #define I_SO   (1 << 0)   /* Scheduling overrun */
    105 #define I_WDH  (1 << 1)   /* Done head write-back */
    106 #define I_SF   (1 << 2)   /* Start of frame */
    107 #define I_RD   (1 << 3)   /* Resume detect */
    108 #define I_UE   (1 << 4)   /* Unrecoverable error */
    109 #define I_FNO  (1 << 5)   /* Frame number overflow */
    110 #define I_RHSC (1 << 6)   /* Root hub status change */
    111 #define I_OC   (1 << 30)  /* Ownership change */
    112 #define I_MI   (1 << 31)  /* Master interrupt (any/all) */
    11365
    11466        /** HCCA pointer (see hw_struct hcca.h) */
    11567        ioport32_t hcca;
    116 #define HCCA_PTR_MASK 0xffffff00 /* HCCA is 256B aligned */
    11768
    11869        /** Currently executed periodic endpoint */
     
    13687        /** Frame time and max packet size for all transfers */
    13788        ioport32_t fm_interval;
    138 #define FMI_FI_MASK (0x3fff) /* Frame interval in bit times (should be 11999)*/
    139 #define FMI_FI_SHIFT (0)
    140 #define FMI_FSMPS_MASK (0x7fff) /* Full speed max packet size */
    141 #define FMI_FSMPS_SHIFT (16)
    142 #define FMI_TOGGLE_FLAG (1 << 31)
    14389
    14490        /** Bit times remaining in current frame */
    14591        const ioport32_t fm_remaining;
    146 #define FMR_FR_MASK FMI_FI_MASK
    147 #define FMR_FR_SHIFT FMI_FI_SHIFT
    148 #define FMR_TOGGLE_FLAG FMI_TOGGLE_FLAG
    14992
    15093        /** Frame number */
    15194        const ioport32_t fm_number;
    152 #define FMN_NUMBER_MASK (0xffff)
    15395
    15496        /** Remaining bit time in frame to start periodic transfers */
    15597        ioport32_t periodic_start;
    156 #define PS_MASK 0x3fff
    157 #define PS_SHIFT 0
    15898
    15999        /** Threshold for starting LS transaction */
    160100        ioport32_t ls_threshold;
    161 #define LST_LST_MASK (0x7fff)
    162101
    163102        /** The first root hub control register */
    164103        ioport32_t rh_desc_a;
    165 /** Number of downstream ports, max 15 */
    166 #define RHDA_NDS_MASK  (0xff)
    167 /** Power switching mode: 0-global, 1-per port*/
    168 #define RHDA_PSM_FLAG  (1 << 8)
    169 /** No power switch: 1-power on, 0-use PSM*/
    170 #define RHDA_NPS_FLAG  (1 << 9)
    171 /** 1-Compound device, must be 0 */
    172 #define RHDA_DT_FLAG   (1 << 10)
    173 /** Over-current mode: 0-global, 1-per port */
    174 #define RHDA_OCPM_FLAG (1 << 11)
    175 /** OC control: 0-use OCPM, 1-OC off */
    176 #define RHDA_NOCP_FLAG (1 << 12)
    177 /** Power on to power good time */
    178 #define RHDA_POTPGT_SHIFT   24
    179104
    180105        /** The other root hub control register */
    181106        ioport32_t rh_desc_b;
    182 /** Device removable mask */
    183 #define RHDB_DR_SHIFT   0
    184 #define RHDB_DR_MASK    0xffffU
    185 /** Power control mask */
    186 #define RHDB_PCC_MASK   0xffffU
    187 #define RHDB_PCC_SHIFT  16
    188107
    189108        /** Root hub status register */
    190109        ioport32_t rh_status;
    191 /* read: 0,
    192  * write: 0-no effect,
    193  *        1-turn off port power for ports
    194  *        specified in PPCM(RHDB), or all ports,
    195  *        if power is set globally */
    196 #define RHS_LPS_FLAG  (1 <<  0)
    197 #define RHS_CLEAR_GLOBAL_POWER RHS_LPS_FLAG /* synonym for the above */
    198 /** Over-current indicator, if per-port: 0 */
    199 #define RHS_OCI_FLAG  (1 <<  1)
    200 
    201 /* read: 0-connect status change does not wake HC
    202  *       1-connect status change wakes HC
    203  * write: 1-set DRWE, 0-no effect */
    204 #define RHS_DRWE_FLAG (1 << 15)
    205 #define RHS_SET_DRWE RHS_DRWE_FLAG
    206 /* read: 0,
    207  * write: 0-no effect
    208  *        1-turn on port power for ports
    209  *        specified in PPCM(RHDB), or all ports,
    210  *        if power is set globally */
    211 #define RHS_LPSC_FLAG (1 << 16)
    212 #define RHS_SET_GLOBAL_POWER RHS_LPSC_FLAG /* synonym for the above */
    213 /** Over-current change indicator*/
    214 #define RHS_OCIC_FLAG (1 << 17)
    215 #define RHS_CLEAR_DRWE (1 << 31)
    216110
    217111        /** Root hub per port status */
     
    249143} ohci_regs_t;
    250144
     145/*
     146 * ohci_regs_t.revision
     147 */
     148
     149#define R_REVISION_MASK (0x3f)
     150#define R_LEGACY_FLAG   (0x80)
     151
     152/*
     153 * ohci_regs_t.control
     154 */
     155 
     156/* Control-bulk service ratio */
     157#define C_CBSR_1_1  (0x0)
     158#define C_CBSR_1_2  (0x1)
     159#define C_CBSR_1_3  (0x2)
     160#define C_CBSR_1_4  (0x3)
     161#define C_CBSR_MASK (0x3)
     162#define C_CBSR_SHIFT 0
     163
     164#define C_PLE (1 << 2)   /* Periodic list enable */
     165#define C_IE  (1 << 3)   /* Isochronous enable */
     166#define C_CLE (1 << 4)   /* Control list enable */
     167#define C_BLE (1 << 5)   /* Bulk list enable */
     168
     169/* Host controller functional state */
     170#define C_HCFS_RESET       (0x0)
     171#define C_HCFS_RESUME      (0x1)
     172#define C_HCFS_OPERATIONAL (0x2)
     173#define C_HCFS_SUSPEND     (0x3)
     174#define C_HCFS_GET(reg) ((OHCI_RD(reg) >> 6) & 0x3)
     175#define C_HCFS_SET(reg, value) \
     176do { \
     177        uint32_t r = OHCI_RD(reg); \
     178        r &= ~(0x3 << 6); \
     179        r |= (value & 0x3) << 6; \
     180        OHCI_WR(reg, r); \
     181} while (0)
     182
     183#define C_IR  (1 << 8)  /* Interrupt routing, make sure it's 0 */
     184#define C_RWC (1 << 9)  /* Remote wakeup connected, host specific */
     185#define C_RWE (1 << 10)  /* Remote wakeup enable */
     186
     187/*
     188 * ohci_regs_t.command_status
     189 */
     190
     191#define CS_HCR (1 << 0)   /* Host controller reset */
     192#define CS_CLF (1 << 1)   /* Control list filled */
     193#define CS_BLF (1 << 2)   /* Bulk list filled */
     194#define CS_OCR (1 << 3)   /* Ownership change request */
     195#if 0
     196#define CS_SOC_MASK (0x3) /* Scheduling overrun count */
     197#define CS_SOC_SHIFT (16)
    251198#endif
     199
     200/*
     201 * ohci_regs_t.interrupt_xxx
     202 */
     203
     204#define I_SO   (1 << 0)   /* Scheduling overrun */
     205#define I_WDH  (1 << 1)   /* Done head write-back */
     206#define I_SF   (1 << 2)   /* Start of frame */
     207#define I_RD   (1 << 3)   /* Resume detect */
     208#define I_UE   (1 << 4)   /* Unrecoverable error */
     209#define I_FNO  (1 << 5)   /* Frame number overflow */
     210#define I_RHSC (1 << 6)   /* Root hub status change */
     211#define I_OC   (1 << 30)  /* Ownership change */
     212#define I_MI   (1 << 31)  /* Master interrupt (any/all) */
     213
     214
     215/*
     216 * ohci_regs_t.hcca
     217 */
     218
     219#define HCCA_PTR_MASK 0xffffff00 /* HCCA is 256B aligned */
     220
     221/*
     222 * ohci_regs_t.fm_interval
     223 */
     224
     225#define FMI_FI_MASK (0x3fff) /* Frame interval in bit times (should be 11999)*/
     226#define FMI_FI_SHIFT (0)
     227#define FMI_FSMPS_MASK (0x7fff) /* Full speed max packet size */
     228#define FMI_FSMPS_SHIFT (16)
     229#define FMI_TOGGLE_FLAG (1 << 31)
     230
     231/*
     232 * ohci_regs_t.fm_remaining
     233 */
     234
     235#define FMR_FR_MASK FMI_FI_MASK
     236#define FMR_FR_SHIFT FMI_FI_SHIFT
     237#define FMR_TOGGLE_FLAG FMI_TOGGLE_FLAG
     238
     239/*
     240 * ohci_regs_t.fm_number
     241 */
     242
     243#define FMN_NUMBER_MASK (0xffff)
     244
     245/*
     246 * ohci_regs_t.periodic_start
     247 */
     248
     249#define PS_MASK 0x3fff
     250#define PS_SHIFT 0
     251
     252/*
     253 * ohci_regs_t.ls_threshold
     254 */
     255
     256#define LST_LST_MASK (0x7fff)
     257
     258/*
     259 * ohci_regs_t.rh_desc_a
     260 */
     261
     262/** Number of downstream ports, max 15 */
     263#define RHDA_NDS_MASK  (0xff)
     264/** Power switching mode: 0-global, 1-per port*/
     265#define RHDA_PSM_FLAG  (1 << 8)
     266/** No power switch: 1-power on, 0-use PSM*/
     267#define RHDA_NPS_FLAG  (1 << 9)
     268/** 1-Compound device, must be 0 */
     269#define RHDA_DT_FLAG   (1 << 10)
     270/** Over-current mode: 0-global, 1-per port */
     271#define RHDA_OCPM_FLAG (1 << 11)
     272/** OC control: 0-use OCPM, 1-OC off */
     273#define RHDA_NOCP_FLAG (1 << 12)
     274/** Power on to power good time */
     275#define RHDA_POTPGT_SHIFT   24
     276
     277/*
     278 * ohci_regs_t.rh_desc_b
     279 */
     280
     281/** Device removable mask */
     282#define RHDB_DR_SHIFT   0
     283#define RHDB_DR_MASK    0xffffU
     284
     285/** Power control mask */
     286#define RHDB_PCC_MASK   0xffffU
     287#define RHDB_PCC_SHIFT  16
     288
     289/*
     290 * ohci_regs_t.rh_status
     291 */
     292
     293/*
     294 * read: 0,
     295 * write: 0-no effect,
     296 *        1-turn off port power for ports
     297 *        specified in PPCM(RHDB), or all ports,
     298 *        if power is set globally
     299 */
     300#define RHS_LPS_FLAG  (1 <<  0)
     301#define RHS_CLEAR_GLOBAL_POWER RHS_LPS_FLAG /* synonym for the above */
     302/** Over-current indicator, if per-port: 0 */
     303#define RHS_OCI_FLAG  (1 <<  1)
     304/*
     305 * read: 0-connect status change does not wake HC
     306 *       1-connect status change wakes HC
     307 * write: 1-set DRWE, 0-no effect
     308 */
     309#define RHS_DRWE_FLAG (1 << 15)
     310#define RHS_SET_DRWE RHS_DRWE_FLAG
     311/*
     312 * read: 0,
     313 * write: 0-no effect
     314 *        1-turn on port power for ports
     315 *        specified in PPCM(RHDB), or all ports,
     316 *        if power is set globally
     317 */
     318#define RHS_LPSC_FLAG (1 << 16)
     319#define RHS_SET_GLOBAL_POWER RHS_LPSC_FLAG /* synonym for the above */
     320/** Over-current change indicator*/
     321#define RHS_OCIC_FLAG (1 << 17)
     322#define RHS_CLEAR_DRWE (1 << 31)
     323
     324#endif
     325
     326/*
     327 * ohci_regs_t.rh_port_status[x]
     328 */
     329
     330/** r: current connect status, w: 1-clear port enable, 0-N/S*/
     331#define RHPS_CCS_FLAG (1 << 0)
     332#define RHPS_CLEAR_PORT_ENABLE RHPS_CCS_FLAG
     333/** r: port enable status, w: 1-set port enable, 0-N/S */
     334#define RHPS_PES_FLAG (1 << 1)
     335#define RHPS_SET_PORT_ENABLE RHPS_PES_FLAG
     336/** r: port suspend status, w: 1-set port suspend, 0-N/S */
     337#define RHPS_PSS_FLAG (1 << 2)
     338#define RHPS_SET_PORT_SUSPEND RHPS_PSS_FLAG
     339/** r: port over-current (if reports are per-port
     340 * w: 1-clear port suspend (start resume if suspened), 0-nothing
     341 */
     342#define RHPS_POCI_FLAG (1 << 3)
     343#define RHPS_CLEAR_PORT_SUSPEND RHPS_POCI_FLAG
     344/** r: port reset status, w: 1-set port reset, 0-N/S */
     345#define RHPS_PRS_FLAG (1 << 4)
     346#define RHPS_SET_PORT_RESET RHPS_PRS_FLAG
     347/** r: port power status, w: 1-set port power, 0-N/S */
     348#define RHPS_PPS_FLAG (1 << 8)
     349#define RHPS_SET_PORT_POWER RHPS_PPS_FLAG
     350/** r: low speed device attached, w: 1-clear port power, 0-N/S */
     351#define RHPS_LSDA_FLAG (1 << 9)
     352#define RHPS_CLEAR_PORT_POWER RHPS_LSDA_FLAG
     353/** connect status change WC */
     354#define RHPS_CSC_FLAG  (1 << 16)
     355/** port enable status change WC */
     356#define RHPS_PESC_FLAG (1 << 17)
     357/** port suspend status change WC */
     358#define RHPS_PSSC_FLAG (1 << 18)
     359/** port over-current change WC */
     360#define RHPS_OCIC_FLAG (1 << 19)
     361/** port reset status change WC */
     362#define RHPS_PRSC_FLAG (1 << 20)
     363#define RHPS_CHANGE_WC_MASK (0x1f0000)
    252364
    253365/**
  • uspace/drv/bus/usb/uhci/hc.c

    r4f8772d4 r904b1bc  
    531531            &instance->transfers_control_slow);
    532532
    533         /*FSBR, This feature is not needed (adds no benefit) and is supposedly
    534          * buggy on certain hw, enable at your own risk. */
     533        /*
     534         * FSBR, This feature is not needed (adds no benefit) and is supposedly
     535         * buggy on certain hw, enable at your own risk.
     536         */
    535537#ifdef FSBR
    536538        transfer_list_set_next(&instance->transfers_bulk_full,
  • uspace/drv/bus/usb/xhci/commands.h

    r4f8772d4 r904b1bc  
    7979        xhci_trb_ring_t trb_ring;
    8080
    81         fibril_mutex_t guard;           /**< Guard access to this structure. */
     81        /** Guard access to this structure. */
     82        fibril_mutex_t guard;
    8283        list_t cmd_list;
    8384
    84         xhci_cr_state_t state;          /**< Whether commands are allowed to be
    85                                              added. */
    86         fibril_condvar_t state_cv;      /**< For waiting on CR state change. */
     85        /** Whether commands are allowed to be added. */
     86        xhci_cr_state_t state;
     87        /** For waiting on CR state change. */
     88        fibril_condvar_t state_cv;
    8789
    88         fibril_condvar_t stopped_cv;    /**< For waiting on CR stopped event. */
     90        /** For waiting on CR stopped event. */
     91        fibril_condvar_t stopped_cv;
    8992} xhci_cmd_ring_t;
    9093
     
    108111
    109112        /** Below are arguments of all commands mixed together.
    110          *  Be sure to know which command accepts what arguments. */
     113         *  Be sure to know which command accepts what arguments.
     114         */
    111115
    112116        uint32_t slot_id;
  • uspace/drv/nic/ne2k/dp8390.c

    r4f8772d4 r904b1bc  
    475475        size_t frames_count = 0;
    476476
    477         /* We may block sending in this loop - after so many received frames there
     477        /*
     478         * We may block sending in this loop - after so many received frames there
    478479         * must be some interrupt pending (for the frames not yet downloaded) and
    479          * we will continue in its handler. */
     480         * we will continue in its handler.
     481         */
    480482        while (frames_count < 16) {
    481483                //TODO: isn't some locking necessary here?
  • uspace/drv/nic/rtl8139/defs.h

    r4f8772d4 r904b1bc  
    280280/** Receiver control register values */
    281281enum rtl8139_rcr {
    282         RCR_ERTH_SHIFT = 24,       /**< Early Rx treshold part shift */
    283         RCR_ERTH_SIZE = 4,         /**< Early Rx treshold part size */
    284 
    285         RCR_MulERINT = 1 << 17,    /**< Multiple early interrupt select */
    286 
    287         /** Minimal error frame length (1 = 8B, 0 = 64B). If AER/AR is set, RER8
    288          * is "Don't care"
     282        /** Early Rx treshold part shift */
     283        RCR_ERTH_SHIFT = 24,
     284        /** Early Rx treshold part size */
     285        RCR_ERTH_SIZE = 4,
     286
     287        /** Multiple early interrupt select */
     288        RCR_MulERINT = 1 << 17,
     289
     290        /** Minimal error frame length (1 = 8B, 0 = 64B).
     291         * If AER/AR is set, RER8 is "Don't care"
    289292         */
    290293        RCR_RER8 = 1 << 16,
    291294
    292         RCR_RXFTH_SHIFT = 13,    /**< Rx FIFO treshold part shitf */
    293         RCR_RXFTH_SIZE  = 3,     /**< Rx FIFO treshold part size */
    294 
    295         RCR_RBLEN_SHIFT = 11,    /**< Rx buffer length part shift */
    296         RCR_RBLEN_SIZE  = 2,     /**< Rx buffer length part size */
    297 
    298         RCR_RBLEN_8k  = 0x00 << RCR_RBLEN_SHIFT,  /**< 8K + 16 byte rx buffer */
    299         RCR_RBLEN_16k = 0x01 << RCR_RBLEN_SHIFT,  /**< 16K + 16 byte rx buffer */
    300         RCR_RBLEN_32k = 0x02 << RCR_RBLEN_SHIFT,  /**< 32K + 16 byte rx buffer */
    301         RCR_RBLEN_64k = 0x03 << RCR_RBLEN_SHIFT,  /**< 64K + 16 byte rx buffer */
    302 
    303         RCR_MXDMA_SHIFT = 8,             /**< Max DMA Burst Size part shift */
    304         RCR_MXDMA_SIZE  = 3,             /**< Max DMA Burst Size part size */
    305 
    306         RCR_WRAP              = 1 << 7,  /**< Rx buffer wrapped */
    307         RCR_ACCEPT_ERROR      = 1 << 5,  /**< Accept error frame */
    308         RCR_ACCEPT_RUNT       = 1 << 4,  /**< Accept Runt (8-64 bytes) frames */
    309         RCR_ACCEPT_BROADCAST  = 1 << 3,  /**< Accept broadcast */
    310         RCR_ACCEPT_MULTICAST  = 1 << 2,  /**< Accept multicast */
    311         RCR_ACCEPT_PHYS_MATCH = 1 << 1,  /**< Accept device MAC address match */
    312         RCR_ACCEPT_ALL_PHYS   = 1 << 0,  /**< Accept all frames with
    313                                           * phys. desticnation
    314                                                                           */
    315         RCR_ACCEPT_MASK = (1 << 6) - 1   /**< Mask of accept part */
     295        /** Rx FIFO treshold part shift */
     296        RCR_RXFTH_SHIFT = 13,
     297        /** Rx FIFO treshold part size */
     298        RCR_RXFTH_SIZE  = 3,
     299
     300        /** Rx buffer length part shift */
     301        RCR_RBLEN_SHIFT = 11,
     302        /** Rx buffer length part size */
     303        RCR_RBLEN_SIZE  = 2,
     304
     305        /** 8K + 16 byte rx buffer */
     306        RCR_RBLEN_8k  = 0x00 << RCR_RBLEN_SHIFT,
     307        /** 16K + 16 byte rx buffer */
     308        RCR_RBLEN_16k = 0x01 << RCR_RBLEN_SHIFT,
     309        /** 32K + 16 byte rx buffer */
     310        RCR_RBLEN_32k = 0x02 << RCR_RBLEN_SHIFT,
     311        /** 64K + 16 byte rx buffer */
     312        RCR_RBLEN_64k = 0x03 << RCR_RBLEN_SHIFT,
     313
     314        /** Max DMA Burst Size part shift */
     315        RCR_MXDMA_SHIFT = 8,
     316        /** Max DMA Burst Size part size */
     317        RCR_MXDMA_SIZE  = 3,
     318
     319        /** Rx buffer wrapped */
     320        RCR_WRAP              = 1 << 7,
     321        /** Accept error frame */
     322        RCR_ACCEPT_ERROR      = 1 << 5,
     323        /** Accept Runt (8-64 bytes) frames */
     324        RCR_ACCEPT_RUNT       = 1 << 4,
     325        /** Accept broadcast */
     326        RCR_ACCEPT_BROADCAST  = 1 << 3,
     327        /** Accept multicast */
     328        RCR_ACCEPT_MULTICAST  = 1 << 2,
     329        /** Accept device MAC address match */
     330        RCR_ACCEPT_PHYS_MATCH = 1 << 1,
     331        /** Accept all frames with phys. destination */
     332        RCR_ACCEPT_ALL_PHYS   = 1 << 0,
     333        /** Mask of accept part */
     334        RCR_ACCEPT_MASK = (1 << 6) - 1
    316335};
    317336
     
    320339enum rtl8139_cscr {
    321340        CS_Testfun       = (1 << 15),
    322         CS_LD            = (1 << 9),  /**< Low TPI link disable signal */
    323         CS_HEART_BEAT    = (1 << 8),  /**< Heart beat enable; 10Mbit mode only */
    324         CS_JABBER_ENABLE = (1 << 7),  /**< Enable jabber function */
     341        /** Low TPI link disable signal */
     342        CS_LD            = (1 << 9),
     343        /** Heart beat enable; 10Mbit mode only */
     344        CS_HEART_BEAT    = (1 << 8),
     345        /** Enable jabber function */
     346        CS_JABBER_ENABLE = (1 << 7),
    325347        CS_F_LINK100     = (1 << 6),
    326348        CS_F_CONNECT     = (1 << 5),
    327         CS_CON_STATUS    = (1 << 3),  /**< connection status:
    328                                        *   1 = valid, 0 = disconnected
    329                                                                    */
    330         CS_CON_STATUS_EN = (1 << 2),  /**< LED1 pin connection status indication */
    331         CS_PASS_SCR      = (1 << 0)   /**< Bypass Scramble  */
     349        /** connection status: 1 = valid, 0 = disconnected */
     350        CS_CON_STATUS    = (1 << 3),
     351        /** LED1 pin connection status indication */
     352        CS_CON_STATUS_EN = (1 << 2),
     353        /** Bypass Scramble */
     354        CS_PASS_SCR      = (1 << 0)
    332355};
    333356
     
    360383/** Auto-negotiation advertisement register */
    361384enum rtl8139_anar {
    362         ANAR_NEXT_PAGE    = (1 << 15),  /**< Next page bit, 0 - primary capability
    363                                          *  1 - protocol specific
    364                                                                          */
    365         ANAR_ACK          = (1 << 14),  /**< Capability reception acknowledge */
    366         ANAR_REMOTE_FAULT = (1 << 13),  /**< Remote fault detection capability */
    367         ANAR_PAUSE        = (1 << 10),  /**< Symetric pause frame capability */
    368         ANAR_100T4        = (1 << 9),   /**< T4, not supported by the device */
    369         ANAR_100TX_FD     = (1 << 8),   /**< 100BASE_TX full duplex */
    370         ANAR_100TX_HD     = (1 << 7),   /**< 100BASE_TX half duplex */
    371         ANAR_10_FD        = (1 << 6),   /**< 10BASE_T full duplex */
    372         ANAR_10_HD        = (1 << 5),   /**< 10BASE_T half duplex */
    373         ANAR_SELECTOR     = 0x1         /**< Selector,
    374                                          *   CSMA/CD (0x1) supported only
    375                                                                          */
     385        /** Next page bit, 0 - primary capability, 1 - protocol specific */
     386        ANAR_NEXT_PAGE    = (1 << 15),
     387        /** Capability reception acknowledge */
     388        ANAR_ACK          = (1 << 14),
     389        /** Remote fault detection capability */
     390        ANAR_REMOTE_FAULT = (1 << 13),
     391        /** Symetric pause frame capability */
     392        ANAR_PAUSE        = (1 << 10),
     393        /** T4, not supported by the device */
     394        ANAR_100T4        = (1 << 9),
     395        /** 100BASE_TX full duplex */
     396        ANAR_100TX_FD     = (1 << 8),
     397        /** 100BASE_TX half duplex */
     398        ANAR_100TX_HD     = (1 << 7),
     399        /** 10BASE_T full duplex */
     400        ANAR_10_FD        = (1 << 6),
     401        /** 10BASE_T half duplex */
     402        ANAR_10_HD        = (1 << 5),
     403        /** Selector, CSMA/CD (0x1) supported only */
     404        ANAR_SELECTOR     = 0x1
    376405};
    377406
     
    409438
    410439enum rtl8139_config4 {
    411         CONFIG4_RxFIFOAutoClr = (1 << 7),  /**< Automatic RxFIFO owerflow clear */
    412         CONFIG4_AnaOff        = (1 << 6),  /**< Analog poweroff */
    413         CONFIG4_LongWF        = (1 << 5),  /**< Long wakeup frame
    414                                             *   (2xCRC8 + 3xCRC16)
    415                                                                                 */
    416         CONFIG4_LWPME         = (1 << 4),  /**< LWAKE and PMEB assertion  */
    417         CONFIG4_LWPTN         = (1 << 2),  /**< LWake pattern */
    418         CONFIG4_PBWakeup      = (1 << 0)   /**< Preboot wakeup */
     440        /** Automatic RxFIFO owerflow clear */
     441        CONFIG4_RxFIFOAutoClr = (1 << 7),
     442        /** Analog poweroff */
     443        CONFIG4_AnaOff        = (1 << 6),
     444        /** Long wakeup frame (2xCRC8 + 3xCRC16) */
     445        CONFIG4_LongWF        = (1 << 5),
     446        /** LWAKE and PMEB assertion */
     447        CONFIG4_LWPME         = (1 << 4),
     448        /** LWake pattern */
     449        CONFIG4_LWPTN         = (1 << 2),
     450        /** Preboot wakeup */
     451        CONFIG4_PBWakeup      = (1 << 0)
    419452};
    420453
     
    438471
    439472enum rtl8139_tcr_bits {
    440         HWVERID_A_SHIFT = 26,           /**< HW version id, part A shift */
    441         HWVERID_A_SIZE  = 5,            /**< HW version id, part A bit size */
    442         HWVERID_A_MASK  = (1 << 5) - 1, /**< HW version id, part A mask */
    443 
    444         IFG_SHIFT = 24,           /**< The interframe gap time setting shift */
    445         IFG_SIZE  = 2,            /**< The interframe gap time setting bit size */
    446 
    447         HWVERID_B_SHIFT = 22,           /**< HW version id, part B shift */
    448         HWVERID_B_SIZE  = 2,            /**< HW version id, part B bit size */
    449         HWVERID_B_MASK  = (1 << 2) - 1, /**< HW version id, part B mask */
    450 
    451         LOOPBACK_SHIFT  = 17,           /**< Loopback mode shift */
    452         LOOPBACK_SIZE   = 2,            /**< Loopback mode size
    453                                           *  00 = normal, 11 = loopback
    454                                                                           */
    455 
    456         APPEND_CRC = 1 << 16,        /**< Append CRC at the end of a frame */
    457 
    458         MXTxDMA_SHIFT = 8,  /**< Max. DMA Burst per TxDMA shift, burst = 16^value */
    459         MXTxDMA_SIZE  = 3,  /**< Max. DMA Burst per TxDMA bit size */
    460 
    461         TX_RETRY_COUNT_SHIFT = 4,            /**< Retries before aborting shift */
    462         TX_RETRY_COUNT_SIZE  = 4,            /**< Retries before aborting size */
    463 
    464         CLEAR_ABORT = 1 << 0    /**< Retransmit aborted frame at the last
    465                                   *  transmitted descriptor
    466                                                           */
     473        /** HW version id, part A shift */
     474        HWVERID_A_SHIFT = 26,
     475        /** HW version id, part A bit size */
     476        HWVERID_A_SIZE  = 5,
     477        /** HW version id, part A mask */
     478        HWVERID_A_MASK  = (1 << 5) - 1,
     479
     480        /** The interframe gap time setting shift */
     481        IFG_SHIFT = 24,
     482        /** The interframe gap time setting bit size */
     483        IFG_SIZE  = 2,
     484
     485        /** HW version id, part B shift */
     486        HWVERID_B_SHIFT = 22,
     487        /** HW version id, part B bit size */
     488        HWVERID_B_SIZE  = 2,
     489        /** HW version id, part B mask */
     490        HWVERID_B_MASK  = (1 << 2) - 1,
     491
     492        /** Loopback mode shift */
     493        LOOPBACK_SHIFT  = 17,
     494        /** Loopback mode size. 00 = normal, 11 = loopback */
     495        LOOPBACK_SIZE   = 2,
     496
     497        /** Append CRC at the end of a frame */
     498        APPEND_CRC = 1 << 16,
     499
     500        /** Max. DMA Burst per TxDMA shift, burst = 16^value */
     501        MXTxDMA_SHIFT = 8,
     502        /** Max. DMA Burst per TxDMA bit size */
     503        MXTxDMA_SIZE  = 3,
     504
     505        /** Retries before aborting shift */
     506        TX_RETRY_COUNT_SHIFT = 4,
     507        /** Retries before aborting size */
     508        TX_RETRY_COUNT_SIZE  = 4,
     509
     510        /** Retransmit aborted frame at the last transmitted descriptor */
     511        CLEAR_ABORT = 1 << 0
    467512};
    468513
  • uspace/lib/compress/inflate.c

    r4f8772d4 r904b1bc  
    319319    uint16_t *symbol)
    320320{
    321         uint16_t code = 0; /* Decoded bits */
    322         size_t first = 0;  /* First code of the given length */
    323         size_t index = 0;  /* Index of the first code of the given length
    324                               in the symbol table */
    325 
    326         size_t len;  /* Current number of bits in the code */
     321        /* Decode bits */
     322        uint16_t code = 0;
     323
     324        /* First code of the given length */
     325        size_t first = 0;
     326
     327        /*
     328         * Index of the first code of the given length
     329         * in the symbol table
     330         */
     331        size_t index = 0;
     332
     333        /* Current number of bits in the code */
     334        size_t len;
     335
    327336        for (len = 1; len <= MAX_HUFFMAN_BIT; len++) {
    328337                /* Get next bit */
  • uspace/lib/drv/generic/logbuf.c

    r4f8772d4 r904b1bc  
    4040#define REMAINDER_STR_FMT " (%zu)..."
    4141/** Expected max size of the remainder string.
    42  * String + terminator + number width (enough for 4GB).*/
     42 * String + terminator + number width (enough for 4GB).
     43 */
    4344#define REMAINDER_STR_LEN (5 + 1 + 10)
    4445
     
    5051/** Space between two groups. */
    5152#define SPACE_GROUP "  "
     53
     54/** Formats the dump with space before, takes care of type casting (ugly). */
     55#define _FORMAT(digits, bits) \
     56        snprintf(dump, dump_size, "%s%0" #digits PRIx##bits, \
     57            space_before, ((uint##bits##_t *)buf)[0]);
    5258
    5359/** Dump one item into given buffer.
     
    7783        buf += index * item_size;
    7884
    79 /* Formats the dump with space before, takes care of type casting (ugly). */
    80 #define _FORMAT(digits, bits) \
    81         snprintf(dump, dump_size, "%s%0" #digits PRIx##bits, \
    82             space_before, ((uint##bits##_t *)buf)[0]);
    83 
    8485        switch (item_size) {
    8586        case 4:
     
    9091                return _FORMAT(2, 8);
    9192        }
    92 #undef _FORMAT
    9393}
    9494
  • uspace/lib/hound/src/protocol.c

    r4f8772d4 r904b1bc  
    7979
    8080
    81 /****
     81/*
    8282 * CLIENT
    83  ****/
     83 */
    8484
    8585/** Well defined service name */
     
    309309    int flags, pcm_format_t format, size_t bsize)
    310310{
    311         const format_convert_t c = { .f = {
    312                 .channels = format.channels,
    313                 .rate = format.sampling_rate / 100,
    314                 .format = format.sample_format,
    315         }};
     311        const format_convert_t c = {
     312                .f = {
     313                        .channels = format.channels,
     314                        .rate = format.sampling_rate / 100,
     315                        .format = format.sample_format,
     316                }
     317        };
     318
    316319        return async_req_4_0(exch, IPC_M_HOUND_STREAM_ENTER, CAP_HANDLE_RAW(id),
    317320            flags, c.arg, bsize);
     
    362365}
    363366
    364 /****
     367/*
    365368 * SERVER
    366  ****/
     369 */
    367370
    368371static void hound_server_read_data(void *stream);
     
    463466                        if (conn)
    464467                                ret = async_data_write_accept(
    465                                     (void**)&conn_name, true, 0, 0, 0, 0);
     468                                    (void **)&conn_name, true, 0, 0, 0, 0);
    466469
    467470                        if (ret == EOK)
     
    559562                case IPC_M_HOUND_STREAM_ENTER:
    560563                        /* check interface functions */
    561                         if (!server_iface || !server_iface->is_record_context
    562                             || !server_iface->add_stream
    563                             || !server_iface->rem_stream) {
     564                        if (!server_iface || !server_iface->is_record_context ||
     565                            !server_iface->add_stream ||
     566                            !server_iface->rem_stream) {
    564567                                async_answer_0(chandle, ENOTSUP);
    565568                                break;
     
    569572                        id = (cap_handle_t) IPC_GET_ARG1(call);
    570573                        flags = IPC_GET_ARG2(call);
    571                         const format_convert_t c = {.arg = IPC_GET_ARG3(call)};
     574                        const format_convert_t c = { .arg = IPC_GET_ARG3(call) };
    572575                        const pcm_format_t f = {
    573                             .sampling_rate = c.f.rate * 100,
    574                             .channels = c.f.channels,
    575                             .sample_format = c.f.format,
     576                                .sampling_rate = c.f.rate * 100,
     577                                .channels = c.f.channels,
     578                                .sample_format = c.f.format,
    576579                        };
    577580                        size_t bsize = IPC_GET_ARG4(call);
     
    587590                            server_iface->server, id);
    588591                        if (rec) {
    589                                 if(server_iface->stream_data_read) {
     592                                if (server_iface->stream_data_read) {
    590593                                        async_answer_0(chandle, EOK);
    591594                                        /* start answering read calls */
     
    631634        errno_t ret_answer = EOK;
    632635        /* accept data write or drain */
    633         while (async_data_write_receive_call(&chandle, &call, &size)
    634             || (IPC_GET_IMETHOD(call) == IPC_M_HOUND_STREAM_DRAIN)) {
     636        while (async_data_write_receive_call(&chandle, &call, &size) ||
     637            (IPC_GET_IMETHOD(call) == IPC_M_HOUND_STREAM_DRAIN)) {
    635638                /* check drain first */
    636639                if (IPC_GET_IMETHOD(call) == IPC_M_HOUND_STREAM_DRAIN) {
     
    660663                }
    661664        }
    662         const errno_t ret = IPC_GET_IMETHOD(call) == IPC_M_HOUND_STREAM_EXIT
    663             ? EOK : EINVAL;
     665        const errno_t ret = IPC_GET_IMETHOD(call) == IPC_M_HOUND_STREAM_EXIT ?
     666            EOK : EINVAL;
    664667
    665668        async_answer_0(chandle, ret);
     
    678681        errno_t ret_answer = EOK;
    679682        /* accept data read and drain */
    680         while (async_data_read_receive_call(&chandle, &call, &size)
    681             || (IPC_GET_IMETHOD(call) == IPC_M_HOUND_STREAM_DRAIN)) {
     683        while (async_data_read_receive_call(&chandle, &call, &size) ||
     684            (IPC_GET_IMETHOD(call) == IPC_M_HOUND_STREAM_DRAIN)) {
    682685                /* drain does not make much sense but it is allowed */
    683686                if (IPC_GET_IMETHOD(call) == IPC_M_HOUND_STREAM_DRAIN) {
     
    704707                }
    705708        }
    706         const errno_t ret = IPC_GET_IMETHOD(call) == IPC_M_HOUND_STREAM_EXIT
    707             ? EOK : EINVAL;
     709        const errno_t ret = IPC_GET_IMETHOD(call) == IPC_M_HOUND_STREAM_EXIT ?
     710            EOK : EINVAL;
    708711
    709712        async_answer_0(chandle, ret);
     
    711714
    712715
    713 /***
     716/*
    714717 * SERVER SIDE
    715  ***/
     718 */
    716719
    717720/**
  • uspace/lib/label/include/std/fat.h

    r4f8772d4 r904b1bc  
    5151
    5252typedef struct fat_bs {
    53         uint8_t         ji[3];          /**< Jump instruction. */
     53        /** Jump instruction */
     54        uint8_t         ji[3];
    5455        uint8_t         oem_name[8];
     56
    5557        /* BIOS Parameter Block */
    56         uint16_t        bps;            /**< Bytes per sector. */
    57         uint8_t         spc;            /**< Sectors per cluster. */
    58         uint16_t        rscnt;          /**< Reserved sector count. */
    59         uint8_t         fatcnt;         /**< Number of FATs. */
    60         uint16_t        root_ent_max;   /**< Maximum number of root directory
    61                                              entries. */
    62         uint16_t        totsec16;       /**< Total sectors. 16-bit version. */
    63         uint8_t         mdesc;          /**< Media descriptor. */
    64         uint16_t        sec_per_fat;    /**< Sectors per FAT12/FAT16. */
    65         uint16_t        sec_per_track;  /**< Sectors per track. */
    66         uint16_t        headcnt;        /**< Number of heads. */
    67         uint32_t        hidden_sec;     /**< Hidden sectors. */
    68         uint32_t        totsec32;       /**< Total sectors. 32-bit version. */
     58
     59        /** Bytes per sector */
     60        uint16_t        bps;
     61        /** Sectors per cluster */
     62        uint8_t         spc;
     63        /** Reserved sector count */
     64        uint16_t        rscnt;
     65        /** Number of FATs */
     66        uint8_t         fatcnt;
     67        /** Maximum number of root directory entries */
     68        uint16_t        root_ent_max;
     69        /** Total sectors. 16-bit version */
     70        uint16_t        totsec16;
     71        /** Media descriptor */
     72        uint8_t         mdesc;
     73        /** Sectors per FAT12/FAT16 */
     74        uint16_t        sec_per_fat;
     75        /** Sectors per track */
     76        uint16_t        sec_per_track;
     77        /** Number of heads */
     78        uint16_t        headcnt;
     79        /** Hidden sectors */
     80        uint32_t        hidden_sec;
     81        /** Total sectors. 32-bit version */
     82        uint32_t        totsec32;
    6983
    7084        union {
  • uspace/lib/posix/src/fnmatch.c

    r4f8772d4 r904b1bc  
    3333 */
    3434
    35 /* This file contains an implementation of the fnmatch() pattern matching
     35/*
     36 * This file contains an implementation of the fnmatch() pattern matching
    3637 * function. There is more code than necessary to account for the possibility
    3738 * of adding POSIX-like locale support to the system in the future. Functions
     
    5455#define INVALID_PATTERN -1
    5556
    56 /* Type for collating element, simple identity with characters now,
     57/*
     58 * Type for collating element, simple identity with characters now,
    5759 * but may be extended for better locale support.
    5860 */
     
    7072 * @return Matching collating element or COLL_ELM_INVALID.
    7173 */
    72 static coll_elm_t _coll_elm_get(const char* str)
     74static coll_elm_t _coll_elm_get(const char *str)
    7375{
    7476        if (str[0] == '\0' || str[1] != '\0') {
     
    306308}
    307309
    308 /**
    309  * Matches the beginning of the given string against a bracket expression
    310  * the pattern begins with.
    311  *
    312  * @param pattern Pointer to the beginning of a bracket expression in a pattern.
    313  *     On success, the pointer is moved to the first character after the
    314  *     bracket expression.
    315  * @param str Unmatched part of the string.
    316  * @param flags Flags given to fnmatch().
    317  * @return INVALID_PATTERN if the pattern is invalid, 0 if there is no match
    318  *     or the number of matched characters on success.
    319  */
    320 static int _match_bracket_expr(const char **pattern, const char *str, int flags)
    321 {
    322         const bool pathname = (flags & FNM_PATHNAME) != 0;
    323         const bool special_period = (flags & FNM_PERIOD) != 0;
    324         const char *p = *pattern;
    325         bool negative = false;
    326         int matched = 0;
    327 
    328         #define _matched(match) { \
     310#define _matched(match) { \
    329311                int _match = match; \
    330312                if (_match < 0) { \
     
    337319        }
    338320
     321/**
     322 * Matches the beginning of the given string against a bracket expression
     323 * the pattern begins with.
     324 *
     325 * @param pattern Pointer to the beginning of a bracket expression in a pattern.
     326 *     On success, the pointer is moved to the first character after the
     327 *     bracket expression.
     328 * @param str Unmatched part of the string.
     329 * @param flags Flags given to fnmatch().
     330 * @return INVALID_PATTERN if the pattern is invalid, 0 if there is no match
     331 *     or the number of matched characters on success.
     332 */
     333static int _match_bracket_expr(const char **pattern, const char *str, int flags)
     334{
     335        const bool pathname = (flags & FNM_PATHNAME) != 0;
     336        const bool special_period = (flags & FNM_PERIOD) != 0;
     337        const char *p = *pattern;
     338        bool negative = false;
     339        int matched = 0;
     340
    339341        assert(*p == '[');  /* calling code should ensure this */
    340342        p++;
     
    342344        if (*str == '\0' || (pathname && *str == '/') ||
    343345            (pathname && special_period && *str == '.' && *(str - 1) == '/')) {
    344                 /* No bracket expression matches end of string,
     346                /*
     347                 * No bracket expression matches end of string,
    345348                 * slash in pathname match or initial period with FNM_PERIOD
    346349                 * option.
     
    398401                return negative ? 0 : matched;
    399402        }
    400 
    401         #undef _matched
    402403}
    403404
     
    416417static bool _partial_match(const char **pattern, const char **string, int flags)
    417418{
    418         /* Only a single *-delimited subpattern is matched here.
     419        /*
     420         * Only a single *-delimited subpattern is matched here.
    419421         * So in this function, '*' is understood as the end of pattern.
    420422         */
     
    473475
    474476                if (*p == '\0') {
    475                         /* End of pattern, must match end of string or
     477                        /*
     478                         * End of pattern, must match end of string or
    476479                         * an end of subdirectory name (optional).
    477480                         */
     
    628631#include <stdio.h>
    629632
     633#define fnmatch_test(x) { if (x) printf("SUCCESS: "#x"\n"); else { printf("FAILED: "#x"\n"); fail++; } }
     634#define match(s1, s2, flags) fnmatch_test(fnmatch(s1, s2, flags) == 0)
     635#define nomatch(s1, s2, flags) fnmatch_test(fnmatch(s1, s2, flags) == FNM_NOMATCH)
     636
    630637void __posix_fnmatch_test()
    631638{
    632639        int fail = 0;
    633640
    634         #undef assert
    635         #define assert(x) { if (x) printf("SUCCESS: "#x"\n"); else { printf("FAILED: "#x"\n"); fail++; } }
    636         #define match(s1, s2, flags) assert(fnmatch(s1, s2, flags) == 0)
    637         #define nomatch(s1, s2, flags) assert(fnmatch(s1, s2, flags) == FNM_NOMATCH)
    638641
    639642        static_assert(FNM_PATHNAME == FNM_FILE_NAME);
  • uspace/lib/usb/include/usb/classes/hub.h

    r4f8772d4 r904b1bc  
    149149        uint8_t characteristics;
    150150
    151 #define HUB_CHAR_POWER_PER_PORT_FLAG    (1 << 0)
    152 #define HUB_CHAR_NO_POWER_SWITCH_FLAG   (1 << 1)
    153 #define HUB_CHAR_COMPOUND_DEVICE        (1 << 2)
    154 #define HUB_CHAR_OC_PER_PORT_FLAG       (1 << 3)
    155 #define HUB_CHAR_NO_OC_FLAG             (1 << 4)
    156 
    157 /* These are invalid for superspeed hub */
    158 #define HUB_CHAR_TT_THINK_16            (1 << 5)
    159 #define HUB_CHAR_TT_THINK_8             (1 << 6)
    160 #define HUB_CHAR_INDICATORS_FLAG        (1 << 7)
    161151
    162152        /** Unused part of characteristics field */
     
    179169        uint8_t max_current;
    180170} __attribute__((packed)) usb_hub_descriptor_header_t;
     171
     172/*
     173 * USB hub characteristics
     174 */
     175#define HUB_CHAR_POWER_PER_PORT_FLAG    (1 << 0)
     176#define HUB_CHAR_NO_POWER_SWITCH_FLAG   (1 << 1)
     177#define HUB_CHAR_COMPOUND_DEVICE        (1 << 2)
     178#define HUB_CHAR_OC_PER_PORT_FLAG       (1 << 3)
     179#define HUB_CHAR_NO_OC_FLAG             (1 << 4)
     180
     181/* These are invalid for superspeed hub */
     182#define HUB_CHAR_TT_THINK_16            (1 << 5)
     183#define HUB_CHAR_TT_THINK_8             (1 << 6)
     184#define HUB_CHAR_INDICATORS_FLAG        (1 << 7)
    181185
    182186/** One bit for the device and one bit for every port */
  • uspace/lib/usbhost/src/ddf_helpers.c

    r4f8772d4 r904b1bc  
    6666 */
    6767static errno_t register_endpoint(ddf_fun_t *fun, usb_pipe_desc_t *pipe_desc,
    68      const usb_endpoint_descriptors_t *ep_desc)
     68    const usb_endpoint_descriptors_t *ep_desc)
    6969{
    7070        assert(fun);
     
    9292}
    9393
    94  /**
    95   * DDF usbhc_iface callback. Unregister endpoint that makes the other end of
    96   * the pipe described.
    97   *
    98   * @param fun DDF function of the device in question.
    99   * @param pipe_desc Pipe description.
    100   * @return Error code.
    101   */
     94/**
     95 * DDF usbhc_iface callback. Unregister endpoint that makes the other end of
     96 * the pipe described.
     97 *
     98 * @param fun DDF function of the device in question.
     99 * @param pipe_desc Pipe description.
     100 * @return Error code.
     101 */
    102102static errno_t unregister_endpoint(ddf_fun_t *fun, const usb_pipe_desc_t *pipe_desc)
    103103{
     
    182182        }
    183183
    184         /* If the driver didn't name the dev when enumerating,
     184        /*
     185         * If the driver didn't name the dev when enumerating,
    185186         * do it in some generic way.
    186187         */
     
    281282        assert(dev);
    282283
    283         const usb_target_t target = {{
    284                 .address = dev->address,
    285                 .endpoint = ifreq->endpoint,
    286                 .stream = ifreq->stream,
    287         }};
     284        const usb_target_t target = {
     285                {
     286                        .address = dev->address,
     287                        .endpoint = ifreq->endpoint,
     288                        .stream = ifreq->stream,
     289                }
     290        };
    288291
    289292        if (!usb_target_is_valid(&target))
  • uspace/lib/usbhost/src/usb2_bus.c

    r4f8772d4 r904b1bc  
    8989}
    9090
    91 static const usb_target_t usb2_default_target = {{
    92         .address = USB_ADDRESS_DEFAULT,
    93         .endpoint = 0,
    94 }};
     91static const usb_target_t usb2_default_target = {
     92        {
     93                .address = USB_ADDRESS_DEFAULT,
     94                .endpoint = 0,
     95        }
     96};
    9597
    9698/**
     
    120122
    121123        usb_endpoint_descriptors_t ep0_desc = {
    122             .endpoint.max_packet_size = CTRL_PIPE_MIN_PACKET_SIZE,
     124                .endpoint.max_packet_size = CTRL_PIPE_MIN_PACKET_SIZE,
    123125        };
    124126
  • uspace/lib/usbhost/src/utility.c

    r4f8772d4 r904b1bc  
    8484        }
    8585
    86         const usb_target_t control_ep = {{
    87                 .address = dev->address,
    88                 .endpoint = 0,
    89         }};
     86        const usb_target_t control_ep = {
     87                {
     88                        .address = dev->address,
     89                        .endpoint = 0,
     90                }
     91        };
    9092
    9193        usb_standard_device_descriptor_t desc = { 0 };
     
    123125int hc_get_device_desc(device_t *device, usb_standard_device_descriptor_t *desc)
    124126{
    125         const usb_target_t control_ep = {{
    126                 .address = device->address,
    127                 .endpoint = 0,
    128         }};
     127        const usb_target_t control_ep = {
     128                {
     129                        .address = device->address,
     130                        .endpoint = 0,
     131                }
     132        };
    129133
    130134        /* Get std device descriptor */
     
    147151int hc_get_hub_desc(device_t *device, usb_hub_descriptor_header_t *desc)
    148152{
    149         const usb_target_t control_ep = {{
    150                 .address = device->address,
    151                 .endpoint = 0,
    152         }};
    153 
    154         const usb_descriptor_type_t type = device->speed >= USB_SPEED_SUPER
    155                 ? USB_DESCTYPE_SSPEED_HUB : USB_DESCTYPE_HUB;
     153        const usb_target_t control_ep = {
     154                {
     155                        .address = device->address,
     156                        .endpoint = 0,
     157                }
     158        };
     159
     160        const usb_descriptor_type_t type = device->speed >= USB_SPEED_SUPER ?
     161            USB_DESCTYPE_SSPEED_HUB : USB_DESCTYPE_HUB;
    156162
    157163        const usb_device_request_setup_packet_t get_hub_desc = {
    158                 .request_type = SETUP_REQUEST_TYPE_DEVICE_TO_HOST
    159                     | (USB_REQUEST_TYPE_CLASS << 5)
    160                     | USB_REQUEST_RECIPIENT_DEVICE,
     164                .request_type = SETUP_REQUEST_TYPE_DEVICE_TO_HOST |
     165                    (USB_REQUEST_TYPE_CLASS << 5) |
     166                    USB_REQUEST_RECIPIENT_DEVICE,
    161167                .request = USB_DEVREQ_GET_DESCRIPTOR,
    162168                .value = uint16_host2usb(type << 8),
     
    244250void hc_reset_toggles(const usb_transfer_batch_t *batch, endpoint_reset_toggle_t reset_cb)
    245251{
    246         if (batch->ep->transfer_type != USB_TRANSFER_CONTROL
    247             || batch->dir != USB_DIRECTION_OUT)
     252        if (batch->ep->transfer_type != USB_TRANSFER_CONTROL ||
     253            batch->dir != USB_DIRECTION_OUT)
    248254                return;
    249255
    250256        const usb_device_request_setup_packet_t *request = &batch->setup.packet;
    251         device_t * const dev = batch->ep->device;
    252 
    253         switch (request->request)
    254         {
    255         /* Clear Feature ENPOINT_STALL */
     257        device_t *const dev = batch->ep->device;
     258
     259        switch (request->request) {
     260                /* Clear Feature ENPOINT_STALL */
    256261        case USB_DEVREQ_CLEAR_FEATURE: /*resets only cleared ep */
    257262                /* 0x2 ( HOST to device | STANDART | TO ENPOINT) */
     
    273278        case USB_DEVREQ_SET_CONFIGURATION:
    274279        case USB_DEVREQ_SET_INTERFACE:
    275                 /* Recipient must be device, this resets all endpoints,
     280                /*
     281                 * Recipient must be device, this resets all endpoints,
    276282                 * In fact there should be no endpoints but EP 0 registered
    277283                 * as different interfaces use different endpoints,
    278284                 * unless you're changing configuration or alternative
    279                  * interface of an already setup device. */
     285                 * interface of an already setup device.
     286                 */
    280287                if (!(request->request_type & SETUP_REQUEST_TYPE_DEVICE_TO_HOST))
    281288                        for (usb_endpoint_t i = 0; i < 2 * USB_ENDPOINT_MAX; ++i)
  • uspace/srv/fs/fat/fat.h

    r4f8772d4 r904b1bc  
    7070
    7171typedef struct fat_bs {
    72         uint8_t         ji[3];          /**< Jump instruction. */
     72        /** Jump instruction */
     73        uint8_t         ji[3];
    7374        uint8_t         oem_name[8];
     75
    7476        /* BIOS Parameter Block */
    75         uint16_t        bps;            /**< Bytes per sector. */
    76         uint8_t         spc;            /**< Sectors per cluster. */
    77         uint16_t        rscnt;          /**< Reserved sector count. */
    78         uint8_t         fatcnt;         /**< Number of FATs. */
    79         uint16_t        root_ent_max;   /**< Maximum number of root directory
    80                                              entries. */
    81         uint16_t        totsec16;       /**< Total sectors. 16-bit version. */
    82         uint8_t         mdesc;          /**< Media descriptor. */
    83         uint16_t        sec_per_fat;    /**< Sectors per FAT12/FAT16. */
    84         uint16_t        sec_per_track;  /**< Sectors per track. */
    85         uint16_t        headcnt;        /**< Number of heads. */
    86         uint32_t        hidden_sec;     /**< Hidden sectors. */
    87         uint32_t        totsec32;       /**< Total sectors. 32-bit version. */
     77
     78        /** Bytes per sector */
     79        uint16_t        bps;
     80        /** Sectors per cluster */
     81        uint8_t         spc;
     82        /** Reserved sector count */
     83        uint16_t        rscnt;
     84        /** Number of FATs */
     85        uint8_t         fatcnt;
     86        /** Maximum number of root directory entries */
     87        uint16_t        root_ent_max;
     88        /** Total sectors. 16-bit version */
     89        uint16_t        totsec16;
     90        /** Media descriptor */
     91        uint8_t         mdesc;
     92        /** Sectors per FAT12/FAT16 */
     93        uint16_t        sec_per_fat;
     94        /** Sectors per track */
     95        uint16_t        sec_per_track;
     96        /** Number of heads */
     97        uint16_t        headcnt;
     98        /** Hidden sectors */
     99        uint32_t        hidden_sec;
     100        /** Total sectors. 32-bit version */
     101        uint32_t        totsec32;
    88102
    89103        union {
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