Changes in uspace/lib/libc/arch/arm32/include/atomic.h [cd769305:8d04f709] in mainline

File:

• uspace/lib/libc/arch/arm32/include/atomic.h (modified) (2 diffs)

uspace/lib/libc/arch/arm32/include/atomic.h

@@ -37 +37 @@
 #define LIBC_arm32_ATOMIC_H_
 
-#define LIBC_ARCH_ATOMIC_H_
-#define CAS 
+#include <bool.h>
 
-#include <atomicdflt.h>
-#include <bool.h>
-#include <sys/types.h>
+typedef struct atomic {
+        volatile long count;
+} atomic_t;
 
-extern uintptr_t *ras_page;
+static inline void atomic_set(atomic_t *val, long i)
+{
+        val->count = i;
+}
+
+static inline long atomic_get(atomic_t *val)
+{
+        return val->count;
+}
 
 static inline bool cas(atomic_t *val, long ov, long nv)
 {
-        long ret = 0;
-
-        /*
-         * The following instructions between labels 1 and 2 constitute a
-         * Restartable Atomic Seqeunce. Should the sequence be non-atomic,
-         * the kernel will restart it.
-         */
-        asm volatile (
-                "1:\n"
-                "       adr %[ret], 1b\n"
-                "       str %[ret], %[rp0]\n"
-                "       adr %[ret], 2f\n"
-                "       str %[ret], %[rp1]\n"
-                "       ldr %[ret], %[addr]\n"
-                "       cmp %[ret], %[ov]\n"
-                "       streq %[nv], %[addr]\n"
-                "2:\n"
-                "       moveq %[ret], #1\n"
-                "       movne %[ret], #0\n"
-                : [ret] "+&r" (ret),
-                  [rp0] "=m" (ras_page[0]),
-                  [rp1] "=m" (ras_page[1]),
-                  [addr] "+m" (val->count)
-                : [ov] "r" (ov),
-                  [nv] "r" (nv)
-                : "memory"
-        );
-
-        ras_page[0] = 0;
-        asm volatile ("" ::: "memory"); 
-        ras_page[1] = 0xffffffff;
-
-        return (bool) ret;
+        /* FIXME: is not atomic */
+        if (val->count == ov) {
+                val->count = nv;
+                return true;
+        }
+        return false;
 }
 
@@ -92 +72 @@
 static inline long atomic_add(atomic_t *val, int i)
 {
-        long ret = 0;
+        int ret;
+        volatile long * mem = &(val->count);
 
-        /*
-         * The following instructions between labels 1 and 2 constitute a
-         * Restartable Atomic Seqeunce. Should the sequence be non-atomic,
-         * the kernel will restart it.
-         */
+        /* FIXME: is not atomic, is broken */
         asm volatile (
-                "1:\n"
-                "       adr %[ret], 1b\n"
-                "       str %[ret], %[rp0]\n"
-                "       adr %[ret], 2f\n"
-                "       str %[ret], %[rp1]\n"
-                "       ldr %[ret], %[addr]\n"
-                "       add %[ret], %[ret], %[imm]\n"
-                "       str %[ret], %[addr]\n"
-                "2:\n"
-                : [ret] "+&r" (ret),
-                  [rp0] "=m" (ras_page[0]),
-                  [rp1] "=m" (ras_page[1]),
-                  [addr] "+m" (val->count)
-                : [imm] "r" (i)
+        "1:\n"
+                "ldr r2, [%1]\n"
+                "add r3, r2, %2\n"
+                "str r3, %0\n"
+                "swp r3, r3, [%1]\n"
+                "cmp r3, r2\n"
+                "bne 1b\n"
+
+                : "=m" (ret)
+                : "r" (mem), "r" (i)
+                : "r3", "r2"
         );
-
-        ras_page[0] = 0;
-        asm volatile ("" ::: "memory"); 
-        ras_page[1] = 0xffffffff;
 
         return ret;