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  • kernel/arch/arm32/src/exception.c

    rc5b69a5e r8cf4823  
    117117
    118118#ifdef HIGH_EXCEPTION_VECTORS
    119 /** Activates use of high exception vectors addresses.
    120  *
    121  * "High vectors were introduced into some implementations of ARMv4 and are
    122  * required in ARMv6 implementations. High vectors allow the exception vector
    123  * locations to be moved from their normal address range 0x00000000-0x0000001C
    124  * at the bottom of the 32-bit address space, to an alternative address range
    125  * 0xFFFF0000-0xFFFF001C near the top of the address space. These alternative
    126  * locations are known as the high vectors.
    127  *
    128  * Prior to ARMv6, it is IMPLEMENTATION DEFINED whether the high vectors are
    129  * supported. When they are, a hardware configuration input selects whether
    130  * the normal vectors or the high vectors are to be used from
    131  * reset." ARM Architecture Reference Manual A2.6.11 (p. 64 in the PDF).
    132  */
     119/** Activates use of high exception vectors addresses. */
    133120static void high_vectors(void)
    134121{
    135         uint32_t control_reg = 0;
    136         // TODO CHeck the armv6 way and implement it
    137 #if defined(PROCESSOR_armv7_a) | defined(ROCESSOR_armv6)
     122        uint32_t control_reg;
     123       
    138124        asm volatile (
    139125                "mrc p15, 0, %[control_reg], c1, c0"
    140126                : [control_reg] "=r" (control_reg)
    141127        );
    142 #elif defined(PROCESSOR_armv4) | defined(PROCESSOR_armv5)
    143         asm volatile (
    144                 "mrc p15, 0, %[control_reg], c1, c1"
    145                 : [control_reg] "=r" (control_reg)
    146         );
    147 #endif
    148128       
    149129        /* switch on the high vectors bit */
    150130        control_reg |= CP15_R1_HIGH_VECTORS_BIT;
    151131       
    152 #if defined(PROCESSOR_armv7_a) | defined(ROCESSOR_armv6)
    153132        asm volatile (
    154133                "mcr p15, 0, %[control_reg], c1, c0"
    155134                :: [control_reg] "r" (control_reg)
    156135        );
    157 #elif defined(PROCESSOR_armv4) | defined(PROCESSOR_armv5)
    158         asm volatile (
    159                 "mcr p15, 0, %[control_reg], c1, c1"
    160                 :: [control_reg] "r" (control_reg)
    161         );
    162 #endif
    163136}
    164137#endif
     
    180153void exception_init(void)
    181154{
    182         // TODO check for availability of high vectors for <= armv5
    183155#ifdef HIGH_EXCEPTION_VECTORS
    184156        high_vectors();
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