Changeset 8bb0af7f in mainline for kernel/arch/arm32/src/cpu/cpu.c
- Timestamp:
- 2021-08-06T07:56:17Z (3 years ago)
- Parents:
- 98a935e
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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kernel/arch/arm32/src/cpu/cpu.c
r98a935e r8bb0af7f 170 170 */ 171 171 control_reg |= SCTLR_CACHE_EN_FLAG; 172 #endif173 #ifdef PROCESSOR_ARCH_armv7_a174 172 /* 175 173 * ICache coherency is elaborated on in barrier.h.
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