Changeset 8b863a62 in mainline for kernel/genarch/src/drivers/pl011/pl011.c

Timestamp:

2014-04-16T17:14:06Z (12 years ago)

Author:

Vojtech Horky <vojtechhorky@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

f857e8b

Parents:

dba3e2c (diff), 70b570c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge mainline changes

File:

• kernel/genarch/src/drivers/pl011/pl011.c (moved) (moved from kernel/genarch/src/drivers/arm926_uart/arm926_uart.c ) (5 diffs)

kernel/genarch/src/drivers/pl011/pl011.c

@@ -32 +32 @@
 /**
  * @file
- * @brief ARM926 on-chip UART (PrimeCell UART, PL011) driver.
+ * @brief ARM PrimeCell PL011 UART driver.
  */
 
-#include <genarch/drivers/arm926_uart/arm926_uart.h>
+#include <genarch/drivers/pl011/pl011.h>
 #include <console/chardev.h>
 #include <console/console.h>
@@ -46 +46 @@
 #include <str.h>
 
-static void arm926_uart_sendb(arm926_uart_t *uart, uint8_t byte)
+static void pl011_uart_sendb(pl011_uart_t *uart, uint8_t byte)
 {
         /* Wait for space becoming available in Tx FIFO. */
         // TODO make pio_read accept consts pointers and remove the cast
-        while ((pio_read_32((ioport32_t*)&uart->regs->flag) & ARM926_UART_FLAG_TXFF_FLAG) != 0)
+        while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_TXFF_FLAG) != 0)
                 ;
 
@@ -56 +56 @@
 }
 
-static void arm926_uart_putchar(outdev_t *dev, wchar_t ch)
+static void pl011_uart_putchar(outdev_t *dev, wchar_t ch)
 {
-        arm926_uart_t *uart = dev->data;
+        pl011_uart_t *uart = dev->data;
 
         if (!ascii_check(ch)) {
-                arm926_uart_sendb(uart, U_SPECIAL);
+                pl011_uart_sendb(uart, U_SPECIAL);
         } else {
                 if (ch == '\n')
-                        arm926_uart_sendb(uart, (uint8_t) '\r');
-                arm926_uart_sendb(uart, (uint8_t) ch);
+                        pl011_uart_sendb(uart, (uint8_t) '\r');
+                pl011_uart_sendb(uart, (uint8_t) ch);
         }
 }
 
-static outdev_operations_t arm926_uart_ops = {
-        .write = arm926_uart_putchar,
+static outdev_operations_t pl011_uart_ops = {
+        .write = pl011_uart_putchar,
         .redraw = NULL,
+        .scroll_up = NULL,
+        .scroll_down = NULL
 };
 
-static irq_ownership_t arm926_uart_claim(irq_t *irq)
+static irq_ownership_t pl011_uart_claim(irq_t *irq)
 {
         return IRQ_ACCEPT;
 }
 
-static void arm926_uart_irq_handler(irq_t *irq)
+static void pl011_uart_irq_handler(irq_t *irq)
 {
-        arm926_uart_t *uart = irq->instance;
+        pl011_uart_t *uart = irq->instance;
 
         // TODO make pio_read accept const pointers and remove the cast
-        while ((pio_read_32((ioport32_t*)&uart->regs->flag) & ARM926_UART_FLAG_RXFE_FLAG) == 0) {
+        while ((pio_read_32((ioport32_t*)&uart->regs->flag) & PL011_UART_FLAG_RXFE_FLAG) == 0) {
                 /* We ignore all error flags here */
                 const uint8_t data = pio_read_32(&uart->regs->data);
@@ -91 +93 @@
         }
         /* Ack interrupts */
-        pio_write_32(&uart->regs->interrupt_clear, ARM926_UART_INTERRUPT_ALL);
+        pio_write_32(&uart->regs->interrupt_clear, PL011_UART_INTERRUPT_ALL);
 }
 
-bool arm926_uart_init(
-    arm926_uart_t *uart, inr_t interrupt, uintptr_t addr, size_t size)
+bool pl011_uart_init(pl011_uart_t *uart, inr_t interrupt, uintptr_t addr)
 {
         ASSERT(uart);
-        uart->regs = (void*)km_map(addr, size, PAGE_NOT_CACHEABLE);
-
+        uart->regs = (void*)km_map(addr, sizeof(pl011_uart_regs_t),
+                                   PAGE_NOT_CACHEABLE);
         ASSERT(uart->regs);
 
+        /* Disable UART */
+        uart->regs->control &= ~ PL011_UART_CONTROL_UARTEN_FLAG;
+
         /* Enable hw flow control */
-        uart->regs->control = 0 |
-            ARM926_UART_CONTROL_UARTEN_FLAG |
-            ARM926_UART_CONTROL_RTSE_FLAG |
-            ARM926_UART_CONTROL_CTSE_FLAG;
+        uart->regs->control |=
+                PL011_UART_CONTROL_RTSE_FLAG |
+                PL011_UART_CONTROL_CTSE_FLAG;
 
         /* Mask all interrupts */
         uart->regs->interrupt_mask = 0;
+        /* Clear interrupts */
+        uart->regs->interrupt_clear = PL011_UART_INTERRUPT_ALL;
+        /* Enable UART, TX and RX */
+        uart->regs->control |=
+                PL011_UART_CONTROL_UARTEN_FLAG |
+                PL011_UART_CONTROL_TXE_FLAG |
+                PL011_UART_CONTROL_RXE_FLAG;
 
-        outdev_initialize("arm926_uart_dev", &uart->outdev, &arm926_uart_ops);
+        outdev_initialize("pl011_uart_dev", &uart->outdev, &pl011_uart_ops);
         uart->outdev.data = uart;
 
         /* Initialize IRQ */
         irq_initialize(&uart->irq);
-        uart->irq.devno = device_assign_devno();
-        uart->irq.inr = interrupt;
-        uart->irq.claim = arm926_uart_claim;
-        uart->irq.handler = arm926_uart_irq_handler;
-        uart->irq.instance = uart;
+        uart->irq.devno = device_assign_devno();
+        uart->irq.inr = interrupt;
+        uart->irq.claim = pl011_uart_claim;
+        uart->irq.handler = pl011_uart_irq_handler;
+        uart->irq.instance = uart;
 
         return true;
 }
 
-void arm926_uart_input_wire(arm926_uart_t *uart, indev_t *indev)
+void pl011_uart_input_wire(pl011_uart_t *uart, indev_t *indev)
 {
         ASSERT(uart);
@@ -132 +142 @@
         uart->indev = indev;
         irq_register(&uart->irq);
-        /* Enable receive interrupt */
-        uart->regs->interrupt_mask |= ARM926_UART_INTERRUPT_RX_FLAG;
+        /* Enable receive interrupts */
+        uart->regs->interrupt_mask |=
+                PL011_UART_INTERRUPT_RX_FLAG |
+                PL011_UART_INTERRUPT_RT_FLAG;
 }