Changeset 8a9a41e in mainline for kernel/arch/arm64/src/asm.S
- Timestamp:
- 2021-10-24T08:28:43Z (3 years ago)
- Children:
- f628215
- Parents:
- 2ce943a (diff), cd981f2a (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - git-author:
- Erik Kučák <35500848+Riko196@…> (2021-10-24 08:28:43)
- git-committer:
- GitHub <noreply@…> (2021-10-24 08:28:43)
- File:
-
- 1 edited
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kernel/arch/arm64/src/asm.S
r2ce943a r8a9a41e 56 56 FUNCTION_END(memcpy_to_uspace_failover_address) 57 57 58 FUNCTION_BEGIN(early_putuchar) 58 /** Flush instruction caches 59 * 60 * @param x0 Starting address of the flushing. 61 * @param x1 Number of bytes to flush. 62 * 63 */ 64 FUNCTION_BEGIN(smc_coherence) 65 /* Initialize loop */ 66 mov x9, x0 67 mov x10, xzr 68 69 __dc_loop: 70 /* Data or Unified Cache Line Clean */ 71 dc cvau, x9 72 add x9, x9, #4 73 add x10, x10, #4 74 cmp x10, x1 75 blo __dc_loop 76 77 dsb ish 78 79 /* Initialize loop */ 80 mov x9, x0 81 mov x10, xzr 82 83 __ic_loop: 84 /* Instruction Cache Line Invalidate */ 85 ic ivau, x9 86 add x9, x9, #4 87 add x10, x10, #4 88 cmp x10, x1 89 blo __ic_loop 90 91 dsb ish 92 isb 59 93 ret 60 FUNCTION_END( early_putuchar)94 FUNCTION_END(smc_coherence) 61 95 62 96 /* Static checks for the istate_t save/load. */
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