Changeset 89cefe78 in mainline for uspace/drv/bus/usb/xhci/endpoint.h

Timestamp:

2017-10-22T21:47:55Z (6 years ago)

Author:

Petr Manek <petr.manek@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

82fe063

Parents:

ee794529

Message:

Refactored transfer DS allocation in preparation for streams. Also, converted EP context setup to table.

File:

• uspace/drv/bus/usb/xhci/endpoint.h (modified) (3 diffs)

uspace/drv/bus/usb/xhci/endpoint.h

@@ -65 +65 @@
         endpoint_t base;        /**< Inheritance. Keep this first. */
 
-        /** Main TRB ring */
+        /** Main TRB ring (or NULL if endpoint uses streams) */
         xhci_trb_ring_t ring;
 
@@ -72 +72 @@
          * endpoint_t */
         xhci_transfer_t active_transfer;
+
+        /** Primary stream context array (or NULL if endpoint doesn't use streams) */
+        xhci_stream_ctx_t *primary_stream_ctx_array;
+
+        /** Maximum number of streams, also a valid range of PSCA above */
+        uint16_t max_streams;
+
+        /* FIXME: Figure out type for these two fields. */
+        uint8_t max_burst;
+        uint8_t mult;
 } xhci_endpoint_t;
 
@@ -101 +111 @@
 int xhci_endpoint_init(xhci_endpoint_t *, xhci_bus_t *);
 void xhci_endpoint_fini(xhci_endpoint_t *);
+int xhci_endpoint_alloc_transfer_ds(xhci_endpoint_t *);
+int xhci_endpoint_free_transfer_ds(xhci_endpoint_t *);
 
 uint8_t xhci_endpoint_dci(xhci_endpoint_t *);