Changeset 850235d in mainline for kernel/arch/arm32/include/arch/mm/page_fault.h
- Timestamp:
- 2013-03-10T14:56:21Z (11 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 05bab88
- Parents:
- ea906c29 (diff), 2277e03 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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kernel/arch/arm32/include/arch/mm/page_fault.h
rea906c29 r850235d 40 40 41 41 42 /** Decribes CP15 "fault status register" (FSR). */43 typedef struct { 44 unsigned status : 3; 45 unsigned domain : 4; 46 unsigned zero : 1; 47 unsigned should_be_zero : 24; 48 } ATTRIBUTE_PACKED fault_status_t; 49 50 51 /** Help union used for casting integer value into #fault_status_t.*/42 /** Decribes CP15 "fault status register" (FSR). 43 * 44 * "VMSAv6 added a fifth fault status bit (bit[10]) to both the IFSR and DFSR. 45 * It is IMPLEMENTATION DEFINED how this bit is encoded in earlier versions of 46 * the architecture. A write flag (bit[11] of the DFSR) has also been 47 * introduced." 48 * ARM Architecture Reference Manual version i ch. B4.6 (PDF p. 719) 49 * 50 * See ARM Architecture Reference Manual ch. B4.9.6 (pdf p.743). for FSR info 51 */ 52 52 typedef union { 53 fault_status_t fs; 54 uint32_t dummy; 55 } fault_status_union_t; 53 struct { 54 unsigned status : 4; 55 unsigned domain : 4; 56 unsigned zero : 1; 57 unsigned lpae : 1; /**< Needs LPAE support implemented */ 58 unsigned fs : 1; /**< armv6+ mandated, earlier IPLM. DEFINED */ 59 unsigned wr : 1; /**< armv6+ only */ 60 unsigned ext : 1 ; /**< external abort */ 61 unsigned cm : 1; /**< Cache maintenance, needs LPAE support */ 62 unsigned should_be_zero : 18; 63 } data; 64 struct { 65 unsigned status : 4; 66 unsigned sbz0 : 6; 67 unsigned fs : 1; 68 unsigned should_be_zero : 21; 69 } inst; 70 uint32_t raw; 71 } fault_status_t; 56 72 57 73
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