Changeset 82fe063 in mainline for uspace/drv/bus/usb/xhci/endpoint.h


Ignore:
Timestamp:
2017-10-22T22:45:34Z (7 years ago)
Author:
Petr Manek <petr.manek@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
81487c4a
Parents:
89cefe78
Message:

More docs. Typo fix.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/usb/xhci/endpoint.h

    r89cefe78 r82fe063  
    6565        endpoint_t base;        /**< Inheritance. Keep this first. */
    6666
    67         /** Main TRB ring (or NULL if endpoint uses streams) */
     67        /** Main transfer ring (unused if streams are enabled) */
    6868        xhci_trb_ring_t ring;
    6969
     
    7676        xhci_stream_ctx_t *primary_stream_ctx_array;
    7777
    78         /** Maximum number of streams, also a valid range of PSCA above */
    79         uint16_t max_streams;
     78        /** Maximum number of primary streams (0-16), also a valid range of PSCA above */
     79        uint8_t max_streams;
    8080
    81         /* FIXME: Figure out type for these two fields. */
     81        /** Maximum number of consecutive USB transactions (0-15) that should be executed per scheduling opportunity */
    8282        uint8_t max_burst;
     83
     84        /** Maximum number of bursts within an interval that this endpoint supports */
    8385        uint8_t mult;
    8486} xhci_endpoint_t;
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