Changeset 807be7e in mainline for uspace/drv/nic/e1k/e1k.c

Timestamp:

2020-05-17T16:52:19Z (4 years ago)

Author:

jxsvoboda <5887334+jxsvoboda@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

145a13b

Parents:

0800b26

git-author:

Colin Parker <cvparker@…> (2020-05-10 18:45:27)

git-committer:

jxsvoboda <5887334+jxsvoboda@…> (2020-05-17 16:52:19)

Message:

Mask the ICR register in the interrupt claim pseudo-code to prevent
false interrupt claims when masked-out ICR causes are true.

File:

• uspace/drv/nic/e1k/e1k.c (modified) (2 diffs)

uspace/drv/nic/e1k/e1k.c

@@ -256 +256 @@
         },
         {
+                .cmd = CMD_AND,
+                .value = ICR_RXT0,
+                .srcarg = 2,
+                .dstarg = 1
+        },
+        {
                 .cmd = CMD_PREDICATE,
                 .value = 2,
-                .srcarg = 2
+                .srcarg = 1
         },
         {
@@ -1274 +1280 @@
         e1000_irq_code.ranges[0].base = (uintptr_t) e1000->reg_base_phys;
         e1000_irq_code.cmds[0].addr = e1000->reg_base_phys + E1000_ICR;
-        e1000_irq_code.cmds[2].addr = e1000->reg_base_phys + E1000_IMC;
+        e1000_irq_code.cmds[3].addr = e1000->reg_base_phys + E1000_IMC;
 
         errno_t rc = register_interrupt_handler(nic_get_ddf_dev(nic), e1000->irq,