Changeset 7ec7b7e in mainline


Ignore:
Timestamp:
2018-01-19T21:04:32Z (6 years ago)
Author:
Jenda <jenda.jzqk73@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
726af29
Parents:
c6f82e5
Message:

Handling HCs with 32 or 64-bytes context size

Location:
uspace/drv/bus/usb/xhci
Files:
7 edited

Legend:

Unmodified
Added
Removed

  • uspace/drv/bus/usb/xhci/debug.c

    rc6f82e5 r7ec7b7e  
    383383}
    384384
    385 void xhci_dump_input_ctx(const struct xhci_input_ctx *ctx)
    386 {
     385void xhci_dump_input_ctx(const xhci_hc_t * hc, const struct xhci_input_ctx *ictx)
     386{
     387        xhci_device_ctx_t *device_ctx = XHCI_GET_DEVICE_CTX(ictx, hc);
     388        xhci_slot_ctx_t *slot_ctx = XHCI_GET_SLOT_CTX(device_ctx, hc);
     389        xhci_input_ctrl_ctx_t *ctrl_ctx = XHCI_GET_CTRL_CTX(ictx, hc);
     390
    387391        usb_log_debug("Input control context:");
    388         usb_log_debug("\tDrop:\t0x%08x", xhci2host(32, ctx->ctrl_ctx.data[0]));
    389         usb_log_debug("\tAdd:\t0x%08x", xhci2host(32, ctx->ctrl_ctx.data[1]));
    390 
    391         usb_log_debug("\tConfig:\t0x%02x", XHCI_INPUT_CTRL_CTX_CONFIG_VALUE(ctx->ctrl_ctx));
    392         usb_log_debug("\tIface:\t0x%02x", XHCI_INPUT_CTRL_CTX_IFACE_NUMBER(ctx->ctrl_ctx));
    393         usb_log_debug("\tAlternate:\t0x%02x", XHCI_INPUT_CTRL_CTX_ALTER_SETTING(ctx->ctrl_ctx));
     392        usb_log_debug("\tDrop:\t0x%08x", xhci2host(32, ctrl_ctx->data[0]));
     393        usb_log_debug("\tAdd:\t0x%08x", xhci2host(32, ctrl_ctx->data[1]));
     394
     395        usb_log_debug("\tConfig:\t0x%02x", XHCI_INPUT_CTRL_CTX_CONFIG_VALUE(*ctrl_ctx));
     396        usb_log_debug("\tIface:\t0x%02x", XHCI_INPUT_CTRL_CTX_IFACE_NUMBER(*ctrl_ctx));
     397        usb_log_debug("\tAlternate:\t0x%02x", XHCI_INPUT_CTRL_CTX_ALTER_SETTING(*ctrl_ctx));
    394398
    395399        usb_log_debug("Slot context:");
    396         xhci_dump_slot_ctx(&ctx->slot_ctx);
     400        xhci_dump_slot_ctx(slot_ctx);
    397401
    398402        for (uint8_t dci = 1; dci <= XHCI_EP_COUNT; dci++)
    399                 if (XHCI_INPUT_CTRL_CTX_DROP(ctx->ctrl_ctx, dci)
    400                     || XHCI_INPUT_CTRL_CTX_ADD(ctx->ctrl_ctx, dci)) {
     403                if (XHCI_INPUT_CTRL_CTX_DROP(*ctrl_ctx, dci)
     404                    || XHCI_INPUT_CTRL_CTX_ADD(*ctrl_ctx, dci)) {
    401405                        usb_log_debug("Endpoint context DCI %u:", dci);
    402                         xhci_dump_endpoint_ctx(&ctx->endpoint_ctx[dci - 1]);
     406                        xhci_ep_ctx_t *ep_ctx = XHCI_GET_EP_CTX(device_ctx, hc, dci - 1);
     407                        xhci_dump_endpoint_ctx(ep_ctx);
    403408                }
    404409}

  • uspace/drv/bus/usb/xhci/debug.h

    rc6f82e5 r7ec7b7e  
    3737#define XHCI_DEBUG_H
    3838
     39#include "hc.h"
     40
    3941/**
    4042 * As the debug header is likely to be included in every file, avoid including
    … …  
    6365void xhci_dump_slot_ctx(const struct xhci_slot_ctx *);
    6466void xhci_dump_endpoint_ctx(const struct xhci_endpoint_ctx *);
    65 void xhci_dump_input_ctx(const struct xhci_input_ctx *);
     67void xhci_dump_input_ctx(const xhci_hc_t *, const struct xhci_input_ctx *);
    6668
    6769#endif

  • uspace/drv/bus/usb/xhci/endpoint.c

    rc6f82e5 r7ec7b7e  
    326326        unsigned idx = xhci_endpoint_index(ep);
    327327        xhci_device_ctx_t *ctx = dev->dev_ctx.virt;
    328         xhci_ep_ctx_t *ep_ctx = &ctx->endpoint_ctx[idx];
     328        const xhci_hc_t * hc = bus_to_hc(dev->base.bus);
     329        xhci_ep_ctx_t *ep_ctx = XHCI_GET_EP_CTX(ctx, hc, idx);
    329330
    330331        return XHCI_EP_STATE(*ep_ctx);

  • uspace/drv/bus/usb/xhci/hc.c

    rc6f82e5 r7ec7b7e  
    223223
    224224        hc->ac64 = XHCI_REG_RD(hc->cap_regs, XHCI_CAP_AC64);
     225        hc->csz = XHCI_REG_RD(hc->cap_regs, XHCI_CAP_CSZ);
    225226        hc->max_slots = XHCI_REG_RD(hc->cap_regs, XHCI_CAP_MAX_SLOTS);
    226227
    … …  
    723724
    724725        /* Prepare memory for the context */
    725         if ((err = dma_buffer_alloc(&dev->dev_ctx, sizeof(xhci_device_ctx_t))))
     726        if ((err = dma_buffer_alloc(&dev->dev_ctx, XHCI_DEVICE_CTX_SIZE(hc))))
    726727                return err;
    727         memset(dev->dev_ctx.virt, 0, sizeof(xhci_device_ctx_t));
     728        memset(dev->dev_ctx.virt, 0, XHCI_DEVICE_CTX_SIZE(hc));
    728729
    729730        /* Get the slot number */
    … …  
    807808static int create_configure_ep_input_ctx(xhci_device_t *dev, dma_buffer_t *dma_buf)
    808809{
    809         const int err = dma_buffer_alloc(dma_buf, sizeof(xhci_input_ctx_t));
     810        const xhci_hc_t * hc = bus_to_hc(dev->base.bus);
     811        const int err = dma_buffer_alloc(dma_buf, XHCI_INPUT_CTX_SIZE(hc));
    810812        if (err)
    811813                return err;
    812814
    813815        xhci_input_ctx_t *ictx = dma_buf->virt;
    814         memset(ictx, 0, sizeof(xhci_input_ctx_t));
     816        memset(ictx, 0, XHCI_INPUT_CTX_SIZE(hc));
    815817
    816818        // Quoting sec. 4.6.5 and 4.6.6: A1, D0, D1 are down (already zeroed), A0 is up.
    817         XHCI_INPUT_CTRL_CTX_ADD_SET(ictx->ctrl_ctx, 0);
    818         xhci_setup_slot_context(dev, &ictx->slot_ctx);
     819        XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), 0);
     820        xhci_slot_ctx_t *slot_ctx = XHCI_GET_SLOT_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc);
     821        xhci_setup_slot_context(dev, slot_ctx);
    819822
    820823        return EOK;
    … …  
    846849
    847850        /* Copy endpoint 0 context and set A1 flag. */
    848         XHCI_INPUT_CTRL_CTX_ADD_SET(ictx->ctrl_ctx, 1);
    849         xhci_setup_endpoint_context(ep0, &ictx->endpoint_ctx[0]);
    850 
     851        XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), 1);
     852        xhci_ep_ctx_t *ep_ctx = XHCI_GET_EP_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc, 0);
     853        xhci_setup_endpoint_context(ep0, ep_ctx);
    851854        /* Address device needs Ctx entries set to 1 only */
    852         xhci_slot_ctx_t *slot_ctx = &ictx->slot_ctx;
     855        xhci_slot_ctx_t *slot_ctx = XHCI_GET_SLOT_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc);
    853856        XHCI_SLOT_CTX_ENTRIES_SET(*slot_ctx, 1);
    854857
    … …  
    857860                return err;
    858861
    859         xhci_device_ctx_t *dev_ctx = dev->dev_ctx.virt;
    860         dev->base.address = XHCI_SLOT_DEVICE_ADDRESS(dev_ctx->slot_ctx);
     862        xhci_device_ctx_t *device_ctx = dev->dev_ctx.virt;
     863        dev->base.address = XHCI_SLOT_DEVICE_ADDRESS(*XHCI_GET_SLOT_CTX(device_ctx, hc));
    861864        usb_log_debug2("Obtained USB address: %d.", dev->base.address);
    862865
    … …  
    911914
    912915        xhci_input_ctx_t *ictx = ictx_dma_buf.virt;
    913         XHCI_INPUT_CTRL_CTX_ADD_SET(ictx->ctrl_ctx, ep_idx + 1); /* Preceded by slot ctx */
    914         memcpy(&ictx->endpoint_ctx[ep_idx], ep_ctx, sizeof(xhci_ep_ctx_t));
    915916
    916917        xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
     918        XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), ep_idx + 1); /* Preceded by slot ctx */
     919
     920        xhci_ep_ctx_t *_ep_ctx = XHCI_GET_EP_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc, ep_idx);
     921        memcpy(_ep_ctx, ep_ctx, XHCI_ONE_CTX_SIZE(hc));
     922
    917923        return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf);
    918924}
    … …  
    932938                return err;
    933939
     940        xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
    934941        xhci_input_ctx_t *ictx = ictx_dma_buf.virt;
    935         XHCI_INPUT_CTRL_CTX_DROP_SET(ictx->ctrl_ctx, ep_idx + 1); /* Preceded by slot ctx */
    936 
    937         xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
     942        XHCI_INPUT_CTRL_CTX_DROP_SET(*XHCI_GET_CTRL_CTX(ictx, hc), ep_idx + 1); /* Preceded by slot ctx */
     943
    938944        return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf);
    939945}
    … …  
    950956{
    951957        dma_buffer_t ictx_dma_buf;
    952         const int err = dma_buffer_alloc(&ictx_dma_buf, sizeof(xhci_input_ctx_t));
     958        xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
     959
     960        const int err = dma_buffer_alloc(&ictx_dma_buf, XHCI_INPUT_CTX_SIZE(hc));
    953961        if (err)
    954962                return err;
    955963
    956964        xhci_input_ctx_t *ictx = ictx_dma_buf.virt;
    957         memset(ictx, 0, sizeof(xhci_input_ctx_t));
    958 
    959         XHCI_INPUT_CTRL_CTX_ADD_SET(ictx->ctrl_ctx, ep_idx + 1);
    960         memcpy(&ictx->endpoint_ctx[ep_idx], ep_ctx, sizeof(xhci_ep_ctx_t));
    961 
    962         xhci_hc_t * const hc = bus_to_hc(dev->base.bus);
     965        memset(ictx, 0, XHCI_INPUT_CTX_SIZE(hc));
     966
     967        XHCI_INPUT_CTRL_CTX_ADD_SET(*XHCI_GET_CTRL_CTX(ictx, hc), ep_idx + 1);
     968        xhci_ep_ctx_t *_ep_ctx = XHCI_GET_EP_CTX(XHCI_GET_DEVICE_CTX(ictx, hc), hc, 0);
     969        memcpy(_ep_ctx, ep_ctx, sizeof(xhci_ep_ctx_t));
     970
    963971        return xhci_cmd_sync_inline(hc, EVALUATE_CONTEXT, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf);
    964972}

  • uspace/drv/bus/usb/xhci/hc.h

    rc6f82e5 r7ec7b7e  
    9696        unsigned max_slots;
    9797        bool ac64;
     98        bool csz;
    9899        uint64_t wrap_time;             /** The last time when mfindex wrap happened */
    99100        uint64_t wrap_count;    /** Amount of mfindex wraps HC has done */

  • uspace/drv/bus/usb/xhci/hw_struct/context.h

    rc6f82e5 r7ec7b7e  
    175175
    176176/**
     177 * Handling HCs with 32 or 64-bytes context size (CSZ)
     178 */
     179#define XHCI_CTX_SIZE_SMALL 32
     180#define XHCI_ONE_CTX_SIZE(hc) (XHCI_CTX_SIZE_SMALL << hc->csz)
     181#define XHCI_SLOT_CTX_OFFSET 0
     182#define XHCI_EP_ARRAY_OFFSET 1
     183#define XHCI_DEVICE_CTX_SIZE(hc) ((XHCI_EP_ARRAY_OFFSET + XHCI_EP_COUNT) * XHCI_ONE_CTX_SIZE(hc))
     184
     185/**
    177186 * Device context: section 6.2.1
    178187 */
     188#define XHCI_GET_SLOT_CTX(dev_ctx, hc) (xhci_slot_ctx_t *)((char*)dev_ctx + XHCI_SLOT_CTX_OFFSET * XHCI_ONE_CTX_SIZE(hc))
     189#define XHCI_GET_EP_CTX(dev_ctx, hc, dci) (xhci_ep_ctx_t *)((char*)dev_ctx + (dci + XHCI_EP_ARRAY_OFFSET) * XHCI_ONE_CTX_SIZE(hc))
     190
    179191typedef struct xhci_device_ctx {
    180         xhci_slot_ctx_t slot_ctx;
    181         xhci_ep_ctx_t endpoint_ctx[XHCI_EP_COUNT];
    182 } __attribute__((packed)) xhci_device_ctx_t;
     192} xhci_device_ctx_t;
    183193
    184194/**
    … …  
    228238 * Input context: section 6.2.5
    229239 */
     240
     241#define XHCI_CTRL_CTX_OFFSET 0
     242#define XHCI_DEVICE_CTX_OFFSET 1
     243#define XHCI_INPUT_CTX_SIZE(hc) (XHCI_DEVICE_CTX_OFFSET * XHCI_ONE_CTX_SIZE(hc) + XHCI_DEVICE_CTX_SIZE(hc))
     244#define XHCI_GET_CTRL_CTX(ictx, hc) (xhci_input_ctrl_ctx_t*)((char*)ictx + XHCI_CTRL_CTX_OFFSET * XHCI_ONE_CTX_SIZE(hc))
     245#define XHCI_GET_DEVICE_CTX(ictx, hc) (xhci_device_ctx_t *)((char*)ictx + XHCI_DEVICE_CTX_OFFSET * XHCI_ONE_CTX_SIZE(hc))
     246
    230247typedef struct xhci_input_ctx {
    231         xhci_input_ctrl_ctx_t ctrl_ctx;
    232         xhci_slot_ctx_t slot_ctx;
    233         xhci_ep_ctx_t endpoint_ctx[XHCI_EP_COUNT];
    234 } __attribute__((packed)) xhci_input_ctx_t;
     248} xhci_input_ctx_t;
    235249
    236250/**

  • uspace/drv/bus/usb/xhci/streams.c

    rc6f82e5 r7ec7b7e  
    338338
    339339        xhci_ep_ctx_t ep_ctx;
    340         memset(&ep_ctx, 0, sizeof(ep_ctx));
     340        memset(&ep_ctx, 0, XHCI_ONE_CTX_SIZE(hc));
    341341        xhci_setup_endpoint_context(xhci_ep, &ep_ctx);
    342342        return hc_update_endpoint(dev, xhci_endpoint_index(xhci_ep), &ep_ctx);
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