Ignore:
Timestamp:
2018-08-02T20:38:05Z (6 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
9b7adc38
Parents:
0c27956
git-author:
Jakub Jermar <jakub@…> (2018-08-01 22:48:10)
git-committer:
Jakub Jermar <jakub@…> (2018-08-02 20:38:05)
Message:

Preserve AR.FPSR in thread context

AR.FPSR is a preserved register so it should be part of the thread
context, leaving its extra copy in istate_t rather for debugging
purposes.

In this commit we also disable all IEEE FP traps and the
Denormal/Unnormal Operand Floating-Point Exception fault for each new
thread context, leaving the thread with the possibility to change this
setting later in uspace.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia64/include/arch/context_struct.h

    r0c27956 r7cd7a8d  
    3737#define CONTEXT_OFFSET_AR_RNAT         0x28
    3838#define CONTEXT_OFFSET_AR_LC           0x30
    39 #define CONTEXT_OFFSET_R1              0x38
    40 #define CONTEXT_OFFSET_R4              0x40
    41 #define CONTEXT_OFFSET_R5              0x48
    42 #define CONTEXT_OFFSET_R6              0x50
    43 #define CONTEXT_OFFSET_R7              0x58
    44 #define CONTEXT_OFFSET_SP              0x60
    45 #define CONTEXT_OFFSET_R13             0x68
    46 #define CONTEXT_OFFSET_PC              0x70
    47 #define CONTEXT_OFFSET_B1              0x78
    48 #define CONTEXT_OFFSET_B2              0x80
    49 #define CONTEXT_OFFSET_B3              0x88
    50 #define CONTEXT_OFFSET_B4              0x90
    51 #define CONTEXT_OFFSET_B5              0x98
    52 #define CONTEXT_OFFSET_PR              0xa0
     39#define CONTEXT_OFFSET_AR_FPSR         0x38
     40#define CONTEXT_OFFSET_R1              0x40
     41#define CONTEXT_OFFSET_R4              0x48
     42#define CONTEXT_OFFSET_R5              0x50
     43#define CONTEXT_OFFSET_R6              0x58
     44#define CONTEXT_OFFSET_R7              0x60
     45#define CONTEXT_OFFSET_SP              0x68
     46#define CONTEXT_OFFSET_R13             0x70
     47#define CONTEXT_OFFSET_PC              0x78
     48#define CONTEXT_OFFSET_B1              0x80
     49#define CONTEXT_OFFSET_B2              0x88
     50#define CONTEXT_OFFSET_B3              0x90
     51#define CONTEXT_OFFSET_B4              0x98
     52#define CONTEXT_OFFSET_B5              0xa0
     53#define CONTEXT_OFFSET_PR              0xa8
    5354#define CONTEXT_OFFSET_F2              0xb0
    5455#define CONTEXT_OFFSET_F3              0xc0
     
    8990        uint64_t ar_rnat;
    9091        uint64_t ar_lc;
     92        uint64_t ar_fpsr;
    9193
    9294        // General registers.
     
    111113        // Predicate registers.
    112114        uint64_t pr;
     115
     116        // Floating-point registers.
    113117        uint128_t f2;
    114118        uint128_t f3;
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