Changeset 7b90778d in mainline for kernel/arch/arm32/src/exception.c


Ignore:
Timestamp:
2011-05-12T18:20:03Z (13 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
e8c5c11
Parents:
750636a (diff), 682cfceb (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge from lp:~jakub/helenos/upa.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/arm32/src/exception.c

    r750636a r7b90778d  
    174174void istate_decode(istate_t *istate)
    175175{
    176         printf("r0 =%#0" PRIx32 "\tr1 =%#0" PRIx32 "\t"
    177             "r2 =%#0" PRIx32 "\tr3 =%#0" PRIx32 "\n",
     176        printf("r0 =%0#10" PRIx32 "\tr1 =%0#10" PRIx32 "\t"
     177            "r2 =%0#10" PRIx32 "\tr3 =%0#10" PRIx32 "\n",
    178178            istate->r0, istate->r1, istate->r2, istate->r3);
    179         printf("r4 =%#" PRIx32 "\tr5 =%#0" PRIx32 "\t"
    180             "r6 =%#0" PRIx32 "\tr7 =%#0" PRIx32 "\n",
     179        printf("r4 =%0#10" PRIx32 "\tr5 =%0#10" PRIx32 "\t"
     180            "r6 =%0#10" PRIx32 "\tr7 =%0#10" PRIx32 "\n",
    181181            istate->r4, istate->r5, istate->r6, istate->r7);
    182         printf("r8 =%#0" PRIx32 "\tr9 =%#0" PRIx32 "\t"
    183             "r10=%#0" PRIx32 "\tfp =%p\n",
    184             istate->r8, istate->r9, istate->r10,
    185             (void *) istate->fp);
    186         printf("r12=%#0" PRIx32 "\tsp =%p\tlr =%p\tspsr=%p\n",
    187             istate->r12, (void *) istate->sp,
    188             (void *) istate->lr, (void *) istate->spsr);
     182        printf("r8 =%0#10" PRIx32 "\tr9 =%0#10" PRIx32 "\t"
     183            "r10=%0#10" PRIx32 "\tfp =%0#10" PRIx32 "\n",
     184            istate->r8, istate->r9, istate->r10, istate->fp);
     185        printf("r12=%0#10" PRIx32 "\tsp =%0#10" PRIx32 "\t"
     186            "lr =%0#10" PRIx32 "\tspsr=%0#10" PRIx32 "\n",
     187            istate->r12, istate->sp, istate->lr, istate->spsr);
    189188}
    190189
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