Changeset 7a38962 in mainline for kernel/arch/arm32/include/cp15.h

Timestamp:

2013-01-20T11:42:22Z (11 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

c8a5c8c

Parents:

9043e7e0

Message:

arm32: Replace cortex-a8 compile check with runtime cache type check.

Update comments.
Fix typos in cp15.h.

File:

• kernel/arch/arm32/include/cp15.h (modified) (1 diff)

kernel/arch/arm32/include/cp15.h

@@ -83 +83 @@
         CTR_I_MIN_LINE_SHIFT = 0,
         CTR_L1I_POLICY_MASK = 0x0000c000,
-        VTR_L1I_POLICY_AIVIVT = 0x00004000,
-        VTR_L1I_POLICY_VIPT = 0x00008000,
+        CTR_L1I_POLICY_AIVIVT = 0x00004000,
+        CTR_L1I_POLICY_VIPT = 0x00008000,
         CTR_L1I_POLICY_PIPT = 0x0000c000,
         /* ARMv6 format */