Changeset 7a0359b in mainline for kernel/arch/sparc64/include/sun4u/cpu.h
- Timestamp:
- 2010-07-02T15:42:19Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- bbfdf62
- Parents:
- e3ee9b9
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/include/sun4u/cpu.h
re3ee9b9 r7a0359b 36 36 #define KERN_sparc64_sun4u_CPU_H_ 37 37 38 #define MANUF_FUJITSU 39 #define MANUF_ULTRASPARC 0x17/**< UltraSPARC I, UltraSPARC II */40 #define MANUF_SUN 38 #define MANUF_FUJITSU 0x04 39 #define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ 40 #define MANUF_SUN 0x3e 41 41 42 #define IMPL_ULTRASPARCI 43 #define IMPL_ULTRASPARCII 44 #define IMPL_ULTRASPARCII_I 45 #define IMPL_ULTRASPARCII_E 46 #define IMPL_ULTRASPARCIII 47 #define IMPL_ULTRASPARCIII_PLUS 48 #define IMPL_ULTRASPARCIII_I 49 #define IMPL_ULTRASPARCIV 50 #define IMPL_ULTRASPARCIV_PLUS 42 #define IMPL_ULTRASPARCI 0x10 43 #define IMPL_ULTRASPARCII 0x11 44 #define IMPL_ULTRASPARCII_I 0x12 45 #define IMPL_ULTRASPARCII_E 0x13 46 #define IMPL_ULTRASPARCIII 0x14 47 #define IMPL_ULTRASPARCIII_PLUS 0x15 48 #define IMPL_ULTRASPARCIII_I 0x16 49 #define IMPL_ULTRASPARCIV 0x18 50 #define IMPL_ULTRASPARCIV_PLUS 0x19 51 51 52 #define IMPL_SPARC64V 52 #define IMPL_SPARC64V 0x5 53 53 54 54 #ifndef __ASM__ … … 58 58 #include <arch/regdef.h> 59 59 #include <arch/asm.h> 60 #include <trace.h> 60 61 61 62 #ifdef CONFIG_SMP … … 64 65 65 66 typedef struct { 66 uint32_t mid; 67 67 uint32_t mid; /**< Processor ID as read from 68 UPA_CONFIG/FIREPLANE_CONFIG. */ 68 69 ver_reg_t ver; 69 uint32_t clock_frequency; 70 uint64_t next_tick_cmpr; 71 72 70 uint32_t clock_frequency; /**< Processor frequency in Hz. */ 71 uint64_t next_tick_cmpr; /**< Next clock interrupt should be 72 generated when the TICK register 73 matches this value. */ 73 74 } cpu_arch_t; 74 75 75 76 /** 77 * Reads the module ID (agent ID/CPUID) of the current CPU. 76 /** Read the module ID (agent ID/CPUID) of the current CPU. 77 * 78 78 */ 79 static inline uint32_t read_mid(void)79 NO_TRACE static inline uint32_t read_mid(void) 80 80 { 81 81 uint64_t icbus_config = asi_u64_read(ASI_ICBUS_CONFIG, 0); 82 82 icbus_config = icbus_config >> ICBUS_CONFIG_MID_SHIFT; 83 83 84 #if defined (US) 84 85 return icbus_config & 0x1f; … … 91 92 } 92 93 93 #endif 94 #endif 94 95 95 96 #endif
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