Changeset 7a0359b in mainline for kernel/arch/ia32/include/asm.h

Timestamp:

2010-07-02T15:42:19Z (14 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

bbfdf62

Parents:

e3ee9b9

Message:

improve kernel function tracing

• add support for more generic kernel sources
• replace attribute((no_instrument_function)) with NO_TRACE macro (shorter and for future compatibility with different compilers)
• to be on the safe side, do not instrument most of the inline and static functions (plus some specific non-static functions)

collateral code cleanup (no change in functionality)

File:

• kernel/arch/ia32/include/asm.h (modified) (24 diffs)

kernel/arch/ia32/include/asm.h

@@ -41 +41 @@
 #include <typedefs.h>
 #include <config.h>
+#include <trace.h>
 
 extern uint32_t interrupt_handler_size;
 
-extern void paging_on(void);
-
-extern void interrupt_handlers(void);
-
-extern void enable_l_apic_in_msr(void);
-
-
-extern void asm_delay_loop(uint32_t t);
-extern void asm_fake_loop(uint32_t t);
-
-
 /** Halt CPU
  *
@@ -60 +50 @@
  *
  */
-static inline __attribute__((noreturn)) void cpu_halt(void)
+NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void)
 {
         while (true) {
@@ -69 +59 @@
 }
 
-static inline void cpu_sleep(void)
-{
-        asm volatile ("hlt\n");
-}
-
-#define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \
+NO_TRACE static inline void cpu_sleep(void)
+{
+        asm volatile (
+                "hlt\n"
+        );
+}
+
+#define GEN_READ_REG(reg) NO_TRACE static inline unative_t read_ ##reg (void) \
         { \
                 unative_t res; \
@@ -84 +76 @@
         }
 
-#define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
+#define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (unative_t regn) \
         { \
                 asm volatile ( \
@@ -119 +111 @@
  *
  */
-static inline void pio_write_8(ioport8_t *port, uint8_t val)
+NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val)
 {
         asm volatile (
                 "outb %b[val], %w[port]\n"
-                :: [val] "a" (val), [port] "d" (port)
+                :: [val] "a" (val),
+                   [port] "d" (port)
         );
 }
@@ -135 +128 @@
  *
  */
-static inline void pio_write_16(ioport16_t *port, uint16_t val)
+NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val)
 {
         asm volatile (
                 "outw %w[val], %w[port]\n"
-                :: [val] "a" (val), [port] "d" (port)
+                :: [val] "a" (val),
+                   [port] "d" (port)
         );
 }
@@ -151 +145 @@
  *
  */
-static inline void pio_write_32(ioport32_t *port, uint32_t val)
+NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val)
 {
         asm volatile (
                 "outl %[val], %w[port]\n"
-                :: [val] "a" (val), [port] "d" (port)
+                :: [val] "a" (val),
+                   [port] "d" (port)
         );
 }
@@ -167 +162 @@
  *
  */
-static inline uint8_t pio_read_8(ioport8_t *port)
+NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
 {
         uint8_t val;
@@ -188 +183 @@
  *
  */
-static inline uint16_t pio_read_16(ioport16_t *port)
+NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
 {
         uint16_t val;
@@ -209 +204 @@
  *
  */
-static inline uint32_t pio_read_32(ioport32_t *port)
+NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
 {
         uint32_t val;
@@ -230 +225 @@
  *
  */
-static inline ipl_t interrupts_enable(void)
+NO_TRACE static inline ipl_t interrupts_enable(void)
 {
         ipl_t v;
@@ -252 +247 @@
  *
  */
-static inline ipl_t interrupts_disable(void)
+NO_TRACE static inline ipl_t interrupts_disable(void)
 {
         ipl_t v;
@@ -273 +268 @@
  *
  */
-static inline void interrupts_restore(ipl_t ipl)
+NO_TRACE static inline void interrupts_restore(ipl_t ipl)
 {
         asm volatile (
@@ -287 +282 @@
  *
  */
-static inline ipl_t interrupts_read(void)
+NO_TRACE static inline ipl_t interrupts_read(void)
 {
         ipl_t v;
@@ -305 +300 @@
  *
  */
-static inline bool interrupts_disabled(void)
+NO_TRACE static inline bool interrupts_disabled(void)
 {
         ipl_t v;
@@ -319 +314 @@
 
 /** Write to MSR */
-static inline void write_msr(uint32_t msr, uint64_t value)
+NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value)
 {
         asm volatile (
                 "wrmsr"
-                :: "c" (msr), "a" ((uint32_t) (value)),
+                :: "c" (msr),
+                   "a" ((uint32_t) (value)),
                    "d" ((uint32_t) (value >> 32))
         );
 }
 
-static inline uint64_t read_msr(uint32_t msr)
+NO_TRACE static inline uint64_t read_msr(uint32_t msr)
 {
         uint32_t ax, dx;
@@ -334 +330 @@
         asm volatile (
                 "rdmsr"
-                : "=a" (ax), "=d" (dx)
+                : "=a" (ax),
+                  "=d" (dx)
                 : "c" (msr)
         );
@@ -349 +346 @@
  *
  */
-static inline uintptr_t get_stack_base(void)
+NO_TRACE static inline uintptr_t get_stack_base(void)
 {
         uintptr_t v;
@@ -367 +364 @@
  *
  */
-static inline void invlpg(uintptr_t addr)
+NO_TRACE static inline void invlpg(uintptr_t addr)
 {
         asm volatile (
@@ -380 +377 @@
  *
  */
-static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
+NO_TRACE static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
 {
         asm volatile (
@@ -393 +390 @@
  *
  */
-static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
+NO_TRACE static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
 {
         asm volatile (
@@ -406 +403 @@
  *
  */
-static inline void idtr_load(ptr_16_32_t *idtr_reg)
+NO_TRACE static inline void idtr_load(ptr_16_32_t *idtr_reg)
 {
         asm volatile (
@@ -419 +416 @@
  *
  */
-static inline void tr_load(uint16_t sel)
+NO_TRACE static inline void tr_load(uint16_t sel)
 {
         asm volatile (
@@ -427 +424 @@
 }
 
+extern void paging_on(void);
+extern void interrupt_handlers(void);
+extern void enable_l_apic_in_msr(void);
+
+extern void asm_delay_loop(uint32_t);
+extern void asm_fake_loop(uint32_t);
+
 #endif