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Changeset 77f65df in mainline


Ignore:
Timestamp:
2009-12-06T19:20:31Z (11 years ago)
Author:
Pavel Rimsky <pavel@…>
Branches:
master
Children:
58d5803d
Parents:
5e53e02
Message:

minor cleanup

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/src/mm/sun4v/tlb.c

    r5e53e02 r77f65df  
    3434 */
    3535
    36 #include <arch/mm/tlb.h>
    3736#include <mm/tlb.h>
    3837#include <mm/as.h>
     
    6059#endif
    6160
    62 void dtlb_pte_copy(pte_t *t, bool ro);
    6361static void itlb_pte_copy(pte_t *);
     62static void dtlb_pte_copy(pte_t *, bool);
    6463static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *);
    65 void do_fast_data_access_mmu_miss_fault(istate_t *istate,
    66     uint64_t page_and_ctx, const char *str);
     64static void do_fast_data_access_mmu_miss_fault(istate_t *, uint64_t,
     65    const char *);
    6766static void do_fast_data_access_protection_fault(istate_t *,
    6867    uint64_t, const char *);
     
    8382#define DMISS_CONTEXT(page_and_ctx)     ((page_and_ctx) & 0x1fff)
    8483
    85 char *context_encoding[] = {
    86         "Primary",
    87         "Secondary",
    88         "Nucleus",
    89         "Reserved"
    90 };
    91 
    92 /** Invalidate all unlocked ITLB and DTLB entries. */
    93 void tlb_invalidate_all(void)
    94 {
    95         uint64_t errno =  __hypercall_fast3(MMU_DEMAP_ALL, 0, 0,
    96                 MMU_FLAG_DTLB | MMU_FLAG_ITLB);
    97         if (errno != EOK) {
    98                 panic("Error code = %d.\n", errno);
    99         }
    100 }
    101 
     84/**
     85 * Descriptions of fault types from the MMU Fault status area.
     86 *
     87 * fault_type[i] contains description of error for which the IFT or DFT
     88 * field of the MMU fault status area is i.
     89 */
     90char *fault_types[] = {
     91        "unknown",
     92        "fast miss",
     93        "fast protection",
     94        "MMU miss",
     95        "invalid RA",
     96        "privileged violation",
     97        "protection violation",
     98        "NFO access",
     99        "so page/NFO side effect",
     100        "invalid VA",
     101        "invalid ASI",
     102        "nc atomic",
     103        "privileged action",
     104        "unknown",
     105        "unaligned access",
     106        "invalid page size"
     107        };
     108       
     109
     110/** Array of MMU fault status areas. */
     111extern mmu_fault_status_area_t mmu_fsas[MAX_NUM_STRANDS];
     112
     113/*
     114 * Invalidate all non-locked DTLB and ITLB entries.
     115 */
    102116void tlb_arch_init(void)
    103117{
     
    116130    bool locked, bool cacheable)
    117131{
    118 #if 0
    119         tlb_tag_access_reg_t tag;
    120         tlb_data_t data;
    121         page_address_t pg;
    122         frame_address_t fr;
    123 
    124         pg.address = page;
    125         fr.address = frame;
    126 
    127         tag.context = ASID_KERNEL;
    128         tag.vpn = pg.vpn;
    129 
    130         dtlb_tag_access_write(tag.value);
    131 
     132        tte_data_t data;
     133       
    132134        data.value = 0;
    133135        data.v = true;
    134         data.size = pagesize;
    135         data.pfn = fr.pfn;
    136         data.l = locked;
     136        data.nfo = false;
     137        data.ra = frame >> FRAME_WIDTH;
     138        data.ie = false;
     139        data.e = false;
    137140        data.cp = cacheable;
    138141#ifdef CONFIG_VIRT_IDX_DCACHE
    139142        data.cv = cacheable;
    140 #endif /* CONFIG_VIRT_IDX_DCACHE */
     143#endif
    141144        data.p = true;
     145        data.x = false;
    142146        data.w = true;
    143         data.g = false;
    144 
    145         dtlb_data_in_write(data.value);
    146 #endif
     147        data.size = pagesize;
     148       
     149        if (locked) {
     150                __hypercall_fast4(
     151                        MMU_MAP_PERM_ADDR, page, 0, data.value, MMU_FLAG_DTLB);
     152        } else {
     153                __hypercall_hyperfast(
     154                        page, ASID_KERNEL, data.value, MMU_FLAG_DTLB, 0,
     155                        MMU_MAP_ADDR);
     156        }
    147157}
    148158
     
    175185                t->page, t->as->asid, data.value, MMU_FLAG_DTLB, 0, MMU_MAP_ADDR);
    176186}
    177 
    178187
    179188/** Copy PTE to ITLB.
     
    288297                }
    289298        }
    290         asm volatile ("sethi 0x41941, %g0");
    291299}
    292300
     
    336344}
    337345
    338 
    339 /** Print TLB entry (for debugging purposes).
    340  *
    341  * The diag field has been left out in order to make this function more generic
    342  * (there is no diag field in US3 architeture).
    343  *
    344  * @param i             TLB entry number
    345  * @param t             TLB entry tag
    346  * @param d             TLB entry data
     346/*
     347 * On Niagara this function does not work, as supervisor software is isolated
     348 * from the TLB by the hypervisor and has no chance to investigate the TLB
     349 * entries.
    347350 */
    348351void tlb_print(void)
     
    388391void describe_dmmu_fault(void)
    389392{
    390 #if 0
    391393        uint64_t myid;
    392394        __hypercall_fast_ret1(0, 0, 0, 0, 0, CPU_MYID, &myid);
     
    406408                panic("Error code = %d.\n", errno);
    407409        }
    408 #endif
    409410}
    410411
     
    418419        /* switch to nucleus because we are mapped by the primary context */
    419420        nucleus_enter();
     421
    420422        __hypercall_fast4(MMU_DEMAP_CTX, 0, 0, asid,
    421423                MMU_FLAG_ITLB | MMU_FLAG_DTLB);
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