Ignore:
Timestamp:
2010-03-13T12:17:02Z (14 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
6ba20a6b
Parents:
d0febca (diff), 2070570 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/include/sun4v/hypercall.h

    rd0febca r7715994  
    7575
    7676/* return codes */
    77 #define EOK             0       /**< Successful return */
    78 #define ENOCPU          1       /**< Invalid CPU id */
    79 #define ENORADDR        2       /**< Invalid real address */
    80 #define ENOINTR         3       /**< Invalid interrupt id */
    81 #define EBADPGSZ        4       /**< Invalid pagesize encoding */
    82 #define EBADTSB         5       /**< Invalid TSB description */
    83 #define HV_EINVAL       6       /**< Invalid argument */
    84 #define EBADTRAP        7       /**< Invalid function number */
    85 #define EBADALIGN       8       /**< Invalid address alignment */
    86 #define EWOULDBLOCK     9       /**< Cannot complete operation without blocking */
    87 #define ENOACCESS       10      /**< No access to specified resource */
    88 #define EIO             11      /**< I/O Error */
    89 #define ECPUERROR       12      /**< CPU is in error state */
    90 #define ENOTSUPPORTED   13      /**< Function not supported */
    91 #define ENOMAP          14      /**< No mapping found */
    92 #define ETOOMANY        15      /**< Too many items specified / limit reached */
    93 #define ECHANNEL        16      /**< Invalid LDC channel */
    94 #define HV_EBUSY        17      /**< Operation failed as resource is otherwise busy */
     77#define HV_EOK                  0       /**< Successful return */
     78#define HV_ENOCPU               1       /**< Invalid CPU id */
     79#define HV_ENORADDR             2       /**< Invalid real address */
     80#define HV_ENOINTR              3       /**< Invalid interrupt id */
     81#define HV_EBADPGSZ             4       /**< Invalid pagesize encoding */
     82#define HV_EBADTSB              5       /**< Invalid TSB description */
     83#define HV_EINVAL               6       /**< Invalid argument */
     84#define HV_EBADTRAP             7       /**< Invalid function number */
     85#define HV_EBADALIGN            8       /**< Invalid address alignment */
     86#define HV_EWOULDBLOCK          9       /**< Cannot complete operation without blocking */
     87#define HV_ENOACCESS            10      /**< No access to specified resource */
     88#define HV_EIO                  11      /**< I/O Error */
     89#define HV_ECPUERROR            12      /**< CPU is in error state */
     90#define HV_ENOTSUPPORTED        13      /**< Function not supported */
     91#define HV_ENOMAP               14      /**< No mapping found */
     92#define HV_ETOOMANY             15      /**< Too many items specified / limit reached */
     93#define HV_ECHANNEL             16      /**< Invalid LDC channel */
     94#define HV_EBUSY                17      /**< Operation failed as resource is otherwise busy */
    9595
    9696
     
    190190__hypercall_fast_ret1(const uint64_t p1, const uint64_t p2, const uint64_t p3,
    191191    const uint64_t p4, const uint64_t p5, const uint64_t function_number,
    192     uint64_t * const ret1)
     192    uint64_t *ret1)
    193193{
    194         uint64_t errno = __hypercall_fast(p1, p2, p3, p4, p5, function_number);
    195         if (ret1 != NULL) {
    196                 asm volatile ("mov %%o1, %0\n" : "=r" (*ret1));
    197         }
    198         return errno;
     194        register uint64_t a6 asm("o5") = function_number;
     195        register uint64_t a1 asm("o0") = p1;
     196        register uint64_t a2 asm("o1") = p2;
     197        register uint64_t a3 asm("o2") = p3;
     198        register uint64_t a4 asm("o3") = p4;
     199        register uint64_t a5 asm("o4") = p5;
     200       
     201        asm volatile (
     202                "ta %8\n"
     203                : "=r" (a1), "=r" (a2)
     204                : "r" (a1), "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6),
     205                  "i" (FAST_TRAP)
     206                : "memory"
     207        );
     208
     209        if (ret1)
     210                *ret1 = a2;
     211
     212        return a1;
    199213}
    200214
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