Changeset 727e639 in mainline for uspace/drv/nic/rtl8169/defs.h
- Timestamp:
- 2014-06-30T21:08:06Z (10 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- ca652eb
- Parents:
- 91e057c
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/rtl8169/defs.h
r91e057c r727e639 110 110 }; 111 111 112 enum rtl8169_mii_registers { 113 MII_BMCR = 0x00, 114 MII_BMSR = 0x01, 115 MII_ANAR = 0x04, 116 }; 117 112 118 /** Command register bits */ 113 119 enum rtl8169_cr { … … 266 272 }; 267 273 274 enum rtl8169_phyar { 275 PHYAR_RW_SHIFT = 31, /**< Read (0) or write (1) command */ 276 PHYAR_RW_READ = (0 << PHYAR_RW_SHIFT), 277 PHYAR_RW_WRITE = (1 << PHYAR_RW_SHIFT), 278 PHYAR_ADDR_SHIFT = 15, 279 PHYAR_ADDR_MASK = 0x1f, 280 PHYAR_DATA_MASK = 0xffff 281 }; 282 283 enum rtl8169_bmcr { 284 BMCR_RESET = (1 << 15), /**< Software reset */ 285 BMCR_SPD_100 = (1 << 13), /**< 100 MBit mode set */ 286 BMCR_AN_ENABLE = (1 << 12), /**< Autonegotion enable */ 287 BMCR_AN_RESTART = (1 << 9), /**< Restart autonegotion */ 288 BMCR_DUPLEX = (1 << 8), /**< Duplex mode: 1=full duplex */ 289 BMCR_SPD_1000 = (1 << 6), /**< 1000 Mbit mode set */ 290 }; 291 268 292 enum rtl8169_descr_control { 269 293 CONTROL_OWN = (1 << 31), /**< Descriptor ownership */
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