Changeset 6dbc500 in mainline for uspace/drv/bus/pci/pciintel/pci.h


Ignore:
Timestamp:
2013-09-11T17:35:28Z (11 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
0a428943
Parents:
65ac220
Message:

PIO_WINDOW_DEV_IFACE support for pciintel.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/pci/pciintel/pci.h

    r65ac220 r6dbc500  
    4040#include "pci_regs.h"
    4141
    42 #define PCI_MAX_HW_RES 8
     42#define PCI_MAX_HW_RES 10
    4343
    4444typedef struct pciintel_bus {
     
    4949        void *conf_data_port;
    5050        void *conf_addr_port;
     51        pio_window_t pio_win;
    5152        fibril_mutex_t conf_mutex;
    5253} pci_bus_t;
     
    6869        hw_resource_list_t hw_resources;
    6970        hw_resource_t resources[PCI_MAX_HW_RES];
     71        pio_window_t pio_window;
    7072} pci_fun_t;
    7173
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