Changeset 6dbc500 in mainline

Timestamp:

2013-09-11T17:35:28Z (11 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0a428943

Parents:

65ac220

Message:

PIO_WINDOW_DEV_IFACE support for pciintel.

Location:

uspace/drv/bus/pci/pciintel

Files:

• pci.c (modified) (8 diffs)
• pci.h (modified) (3 diffs)

uspace/drv/bus/pci/pciintel/pci.c

@@ -57 +57 @@
 #include <ops/hw_res.h>
 #include <device/hw_res.h>
+#include <ops/pio_window.h>
+#include <device/pio_window.h>
 #include <ddi.h>
 #include <pci_dev_iface.h>
@@ -141 +143 @@
 }
 
+static pio_window_t *pciintel_get_pio_window(ddf_fun_t *fnode)
+{
+        pci_fun_t *fun = pci_fun(fnode);
+        
+        if (fun == NULL)
+                return NULL;
+        return &fun->pio_window;
+}
+
+
 static int pci_config_space_write_32(ddf_fun_t *fun, uint32_t address,
     uint32_t data)
@@ -198 +210 @@
         .get_resource_list = &pciintel_get_resources,
         .enable_interrupt = &pciintel_enable_interrupt,
+};
+
+static pio_window_ops_t pciintel_pio_window_ops = {
+        .get_pio_window = &pciintel_get_pio_window
 };
 
@@ -211 +227 @@
 static ddf_dev_ops_t pci_fun_ops = {
         .interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops,
+        .interfaces[PIO_WINDOW_DEV_IFACE] = &pciintel_pio_window_ops,
         .interfaces[PCI_DEV_IFACE] = &pci_dev_ops
 };
@@ -617 +634 @@
                         pci_read_bars(fun);
                         pci_read_interrupt(fun);
+
+                        /* Propagate the PIO window to the function. */
+                        fun->pio_window = bus->pio_win;
                         
                         ddf_fun_set_ops(fun->fnode, &pci_fun_ops);
@@ -647 +667 @@
 static int pci_dev_add(ddf_dev_t *dnode)
 {
+        hw_resource_list_t hw_resources;
         pci_bus_t *bus = NULL;
         ddf_fun_t *ctl = NULL;
@@ -672 +693 @@
                 goto fail;
         }
-        
-        hw_resource_list_t hw_resources;
+
+        rc = pio_window_get(sess, &bus->pio_win);
+        if (rc != EOK) {
+                ddf_msg(LVL_ERROR, "pci_dev_add failed to get PIO window "
+                    "for the device.");
+                goto fail;
+        }
         
         rc = hw_res_get_resource_list(sess, &hw_resources);
@@ -763 +789 @@
 {
         ddf_log_init(NAME);
-        pci_fun_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops;
-        pci_fun_ops.interfaces[PCI_DEV_IFACE] = &pci_dev_ops;
 }
 

uspace/drv/bus/pci/pciintel/pci.h

@@ -40 +40 @@
 #include "pci_regs.h"
 
-#define PCI_MAX_HW_RES 8
+#define PCI_MAX_HW_RES 10 
 
 typedef struct pciintel_bus {
@@ -49 +49 @@
         void *conf_data_port;
         void *conf_addr_port;
+        pio_window_t pio_win;
         fibril_mutex_t conf_mutex;
 } pci_bus_t;
@@ -68 +69 @@
         hw_resource_list_t hw_resources;
         hw_resource_t resources[PCI_MAX_HW_RES];
+        pio_window_t pio_window;
 } pci_fun_t;