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Changeset 5d36062 in mainline


Ignore:
Timestamp:
2011-07-13T21:02:44Z (10 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master
Children:
159100a
Parents:
ca2815e
Message:

OHCI: Replace volatile uint with ioport type.

Location:
uspace/drv/bus/usb/ohci
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/usb/ohci/hc.c

    rca2815e r5d36062  
    9393        ohci_regs_t *registers;
    9494        const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
     95        if (ret != EOK)
     96                return ret;
    9597
    9698        /* Some bogus access to force create mapping. DO NOT remove,
     
    105107         */
    106108        registers->revision;
    107 
    108         if (ret != EOK)
    109                 return ret;
    110109
    111110        memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
  • uspace/drv/bus/usb/ohci/ohci.c

    rca2815e r5d36062  
    209209
    210210        /* Register handler to avoid interrupt lockup */
    211         ret = register_interrupt_handler(device, irq, irq_handler,
    212             &irq_code);
     211        ret = register_interrupt_handler(device, irq, irq_handler, &irq_code);
    213212        CHECK_RET_DEST_FREE_RETURN(ret,
    214213            "Failed to register interrupt handler: %s.\n", str_error(ret));
  • uspace/drv/bus/usb/ohci/ohci_regs.h

    rca2815e r5d36062  
    3434#ifndef DRV_OHCI_OHCI_REGS_H
    3535#define DRV_OHCI_OHCI_REGS_H
    36 #include <stdint.h>
     36#include <sys/types.h>
    3737
    3838#define LEGACY_REGS_OFFSET 0x100
     
    4040/** OHCI memory mapped registers structure */
    4141typedef struct ohci_regs {
    42         const volatile uint32_t revision;
     42        const ioport32_t revision;
    4343#define R_REVISION_MASK (0x3f)
    4444#define R_REVISION_SHIFT (0)
    4545#define R_LEGACY_FLAG   (0x80)
    4646
    47         volatile uint32_t control;
     47        ioport32_t control;
    4848#define C_CBSR_MASK (0x3) /* Control-bulk service ratio */
    4949#define C_CBSR_1_1  (0x0)
     
    7878#define C_RWE (1 << 10)  /* Remote wakeup enable */
    7979
    80         volatile uint32_t command_status;
     80        ioport32_t command_status;
    8181#define CS_HCR (1 << 0)   /* Host controller reset */
    8282#define CS_CLF (1 << 1)   /* Control list filled */
     
    9090         * writing causes enable/disable,
    9191         * status is write-clean (writing 1 clears the bit*/
    92         volatile uint32_t interrupt_status;
    93         volatile uint32_t interrupt_enable;
    94         volatile uint32_t interrupt_disable;
     92        ioport32_t interrupt_status;
     93        ioport32_t interrupt_enable;
     94        ioport32_t interrupt_disable;
    9595#define I_SO   (1 << 0)   /* Scheduling overrun */
    9696#define I_WDH  (1 << 1)   /* Done head write-back */
     
    104104
    105105        /** HCCA pointer (see hw_struct hcca.h) */
    106         volatile uint32_t hcca;
     106        ioport32_t hcca;
    107107#define HCCA_PTR_MASK 0xffffff00 /* HCCA is 256B aligned */
    108108
    109109        /** Currently executed periodic endpoint */
    110         const volatile uint32_t periodic_current;
     110        const ioport32_t periodic_current;
    111111
    112112        /** The first control endpoint */
    113         volatile uint32_t control_head;
     113        ioport32_t control_head;
    114114
    115115        /** Currently executed control endpoint */
    116         volatile uint32_t control_current;
     116        ioport32_t control_current;
    117117
    118118        /** The first bulk endpoint */
    119         volatile uint32_t bulk_head;
     119        ioport32_t bulk_head;
    120120
    121121        /** Currently executed bulk endpoint */
    122         volatile uint32_t bulk_current;
     122        ioport32_t bulk_current;
    123123
    124124        /** Done TD list, this value is periodically written to HCCA */
    125         const volatile uint32_t done_head;
     125        const ioport32_t done_head;
    126126
    127127        /** Frame time and max packet size for all transfers */
    128         volatile uint32_t fm_interval;
     128        ioport32_t fm_interval;
    129129#define FMI_FI_MASK (0x3fff) /* Frame interval in bit times (should be 11999)*/
    130130#define FMI_FI_SHIFT (0)
     
    134134
    135135        /** Bit times remaining in current frame */
    136         const volatile uint32_t fm_remaining;
     136        const ioport32_t fm_remaining;
    137137#define FMR_FR_MASK FMI_FI_MASK
    138138#define FMR_FR_SHIFT FMI_FI_SHIFT
     
    140140
    141141        /** Frame number */
    142         const volatile uint32_t fm_number;
     142        const ioport32_t fm_number;
    143143#define FMN_NUMBER_MASK (0xffff)
    144144
    145145        /** Remaining bit time in frame to start periodic transfers */
    146         volatile uint32_t periodic_start;
     146        ioport32_t periodic_start;
    147147#define PS_PS_MASK (0x3fff) /* bit time when periodic get priority (0x3e67) */
    148148
    149149        /** Threshold for starting LS transaction */
    150         volatile uint32_t ls_threshold;
     150        ioport32_t ls_threshold;
    151151#define LST_LST_MASK (0x7fff)
    152152
    153153        /** The first root hub control register */
    154         volatile uint32_t rh_desc_a;
     154        ioport32_t rh_desc_a;
    155155#define RHDA_NDS_MASK (0xff) /* Number of downstream ports, max 15 */
    156156#define RHDA_NDS_SHIFT (0)
     
    164164
    165165        /** The other root hub control register */
    166         volatile uint32_t rh_desc_b;
     166        ioport32_t rh_desc_b;
    167167#define RHDB_DR_MASK (0xffff) /* Device removable mask */
    168168#define RHDB_DR_SHIFT (0)
     
    176176
    177177        /** Root hub status register */
    178         volatile uint32_t rh_status;
     178        ioport32_t rh_status;
    179179#define RHS_LPS_FLAG  (1 <<  0)/* read: 0,
    180180                                * write: 0-no effect,
     
    198198
    199199        /** Root hub per port status */
    200         volatile uint32_t rh_port_status[];
     200        ioport32_t rh_port_status[];
    201201#define RHPS_CCS_FLAG (1 << 0) /* r: current connect status,
    202202                                * w: 1-clear port enable, 0-nothing */
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