Fork us on GitHub Follow us on Facebook Follow us on Twitter

Changeset 5c5f522 in mainline


Ignore:
Timestamp:
2012-01-25T20:09:29Z (8 years ago)
Author:
Frantisek Princ <frantisek.princ@…>
Branches:
master
Children:
cf858877
Parents:
3ce5162 (diff), 5cd3d67 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge with mainline

Location:
uspace/drv/nic/rtl8139
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/nic/rtl8139/defs.h

    r3ce5162 r5c5f522  
    2929/** @file rtl8139_defs.h
    3030 *
    31  *  Registers, bit positions and masks definition of the RTL8139 network family
    32  *  cards
    33  */
    34 
    35 #ifndef RTL8139_DEFS_H_INCLUDED_
    36 #define RTL8139_DEFS_H_INCLUDED_
     31 * Registers, bit positions and masks definition
     32 * of the RTL8139 network family cards
     33 */
     34
     35#ifndef RTL8139_DEFS_H_
     36#define RTL8139_DEFS_H_
     37
    3738#include <sys/types.h>
    3839#include <libarch/ddi.h>
    3940
    40 
    41 /** The size of RTL8139 registers address space */
    42 #define RTL8139_IO_SIZE 256
    43 
    44 /** The maximal transmitted frame length in bytes allowed according to RTL8139
    45  *  documentation (see SIZE part of TSD documentation)
    46  */
    47 #define RTL8139_FRAME_MAX_LENGTH 1792
    48 
     41/** Size of RTL8139 registers address space */
     42#define RTL8139_IO_SIZE  256
     43
     44/** Maximal transmitted frame length
     45 *
     46 * Maximal transmitted frame length in bytes
     47 * allowed according to the RTL8139 documentation
     48 * (see SIZE part of TSD documentation).
     49 *
     50 */
     51#define RTL8139_FRAME_MAX_LENGTH  1792
    4952
    5053/** HW version
    5154 *
    52  *  as can be detected from HWVERID part of TCR
    53  *  (Transmit Configuration Register)
    54  */
    55 enum rtl8139_version_id {
     55 * As can be detected from HWVERID part of TCR
     56 * (Transmit Configuration Register).
     57 *
     58 */
     59typedef enum {
    5660        RTL8139 = 0,          /**< RTL8139 */
    5761        RTL8139A,             /**< RTL8139A */
     
    6670        RTL8101,              /**< RTL8101 */
    6771        RTL8139_VER_COUNT     /**< Count of known RTL versions, the last value */
    68 };
    69 
    70 extern const char* model_names[RTL8139_VER_COUNT];
     72} rtl8139_version_id_t;
    7173
    7274/** Registers of RTL8139 family card offsets from the memory address base */
     
    7577        MAC0  = IDR0,    /**< Alias for IDR0 */
    7678
    77         // 0x6 - 0x7 reserved
     79        // 0x06 - 0x07 reserved
    7880
    7981        MAR0    = 0x08,  /**< Multicast mask registers 8 1b registers sequence */
     
    213215        pio_write_8(io_base + CR9346, RTL8139_REGS_LOCKED);
    214216}
     217
    215218/** Allow to change Config0-4 and BMCR register  */
    216219static inline void rtl8139_regs_unlock(void *io_base)
     
    417420
    418421/** Maximal runt frame size + 1 */
    419 #define RTL8139_RUNT_MAX_SIZE 64
     422#define RTL8139_RUNT_MAX_SIZE  64
    420423
    421424/** Bits in frame header */
     
    470473
    471474/** Mapping of HW version -> version ID */
    472 struct rtl8139_hwver_map { 
    473         uint32_t hwverid;                /**< HW version value in the register */
    474         enum rtl8139_version_id ver_id;  /**< appropriate version id */
     475struct rtl8139_hwver_map {
     476        uint32_t hwverid;             /**< HW version value in the register */
     477        rtl8139_version_id_t ver_id;  /**< appropriate version id */
    475478};
    476479
    477480/** Mapping of HW version -> version ID */
    478481extern const struct rtl8139_hwver_map rtl8139_versions[RTL8139_VER_COUNT + 1];
     482extern const char* model_names[RTL8139_VER_COUNT];
    479483
    480484/** Size in the frame header while copying from RxFIFO to Rx buffer */
    481 #define RTL8139_EARLY_SIZE UINT16_C(0xfff0)
     485#define RTL8139_EARLY_SIZE  UINT16_C(0xfff0)
     486
    482487/** The only supported pause frame time value */
    483 #define RTL8139_PAUSE_VAL UINT16_C(0xFFFF)
     488#define RTL8139_PAUSE_VAL  UINT16_C(0xFFFF)
    484489
    485490/** Size of the frame header in front of the received frame */
    486 #define RTL_FRAME_HEADER_SIZE 4
     491#define RTL_FRAME_HEADER_SIZE  4
    487492
    488493/** 8k buffer */
  • uspace/drv/nic/rtl8139/driver.c

    r3ce5162 r5c5f522  
    5555/** Global mutex for work with shared irq structure */
    5656FIBRIL_MUTEX_INITIALIZE(irq_reg_lock);
     57
    5758/** Lock interrupt structure mutex */
    58 #define RTL8139_IRQ_STRUCT_LOCK() fibril_mutex_lock(&irq_reg_lock)
     59#define RTL8139_IRQ_STRUCT_LOCK() \
     60        fibril_mutex_lock(&irq_reg_lock)
     61
    5962/** Unlock interrupt structure mutex */
    60 #define RTL8139_IRQ_STRUCT_UNLOCK() fibril_mutex_unlock(&irq_reg_lock)
     63#define RTL8139_IRQ_STRUCT_UNLOCK() \
     64        fibril_mutex_unlock(&irq_reg_lock)
    6165
    6266/** PCI clock frequency in kHz */
    63 #define RTL8139_PCI_FREQ_KHZ 33000
    64 
    65 #define RTL8139_AUTONEG_CAPS (ETH_AUTONEG_10BASE_T_HALF \
    66     | ETH_AUTONEG_10BASE_T_FULL | ETH_AUTONEG_100BASE_TX_HALF \
    67     | ETH_AUTONEG_100BASE_TX_FULL | ETH_AUTONEG_PAUSE_SYMETRIC)
     67#define RTL8139_PCI_FREQ_KHZ  33000
     68
     69#define RTL8139_AUTONEG_CAPS (ETH_AUTONEG_10BASE_T_HALF | \
     70        ETH_AUTONEG_10BASE_T_FULL | ETH_AUTONEG_100BASE_TX_HALF | \
     71        ETH_AUTONEG_100BASE_TX_FULL | ETH_AUTONEG_PAUSE_SYMETRIC)
    6872
    6973/** Lock transmitter and receiver data
    70  *  This function shall be called whenever both transmitter and receiver locking
    71  *  to force safe lock ordering (deadlock prevention)
    72  *
    73  *  @param rtl8139  RTL8139 private data
     74 *
     75 * This function shall be called whenever
     76 * both transmitter and receiver locking
     77 * to force safe lock ordering (deadlock prevention)
     78 *
     79 * @param rtl8139 RTL8139 private data
     80 *
    7481 */
    7582inline static void rtl8139_lock_all(rtl8139_t *rtl8139)
     
    8289/** Unlock transmitter and receiver data
    8390 *
    84  *  @param rtl8139  RTL8139 private data
     91 * @param rtl8139 RTL8139 private data
     92 *
    8593 */
    8694inline static void rtl8139_unlock_all(rtl8139_t *rtl8139)
     
    457465        pio_write_32(tsd, tsd_value);
    458466        return;
    459 
     467       
    460468err_busy_no_inc:
    461469err_size:
     
    513521 *
    514522 * @return The frame list node (not connected)
     523 *
    515524 */
    516525static nic_frame_t *rtl8139_read_frame(nic_t *nic_data,
     
    12151224        ddf_msg(LVL_DEBUG, "The device is initialized");
    12161225        return ret;
    1217 
     1226       
    12181227failed:
    12191228        ddf_msg(LVL_ERROR, "The device initialization failed");
     
    13421351
    13431352        return EOK;
    1344 
     1353       
    13451354err_fun_bind:
    13461355        ddf_fun_unbind(fun);
  • uspace/drv/nic/rtl8139/driver.h

    r3ce5162 r5c5f522  
    3030#define RTL8139_DRIVER_H_
    3131
     32#include <sys/types.h>
     33#include <stdint.h>
    3234#include "defs.h"
    3335#include "general.h"
    34 #include <sys/types.h>
    35 #include <stdint.h>
    3636
    3737/** The driver name */
    38 #define NAME "rtl8139"
     38#define NAME  "rtl8139"
     39
    3940/** Transmittion buffers count */
    40 #define TX_BUFF_COUNT 4
    41 /** Size of buffer for one frame
    42  *  - 2kB
    43  */
    44 #define TX_BUFF_SIZE (2 * 1024)
    45 /** Count of pages to allocate for TxBuffers */
    46 #define TX_PAGES 2
     41#define TX_BUFF_COUNT  4
     42
     43/** Size of buffer for one frame (2kB) */
     44#define TX_BUFF_SIZE  (2 * 1024)
     45
     46/** Number of pages to allocate for TxBuffers */
     47#define TX_PAGES  2
    4748
    4849/** Size of the CRC after the received frame in the receiver buffer */
    49 #define RTL8139_CRC_SIZE 4
     50#define RTL8139_CRC_SIZE  4
    5051
    5152/** The default mode of accepting unicast frames */
    52 #define RTL8139_RCR_UCAST_DEFAULT RCR_ACCEPT_PHYS_MATCH
     53#define RTL8139_RCR_UCAST_DEFAULT  RCR_ACCEPT_PHYS_MATCH
     54
    5355/** The default mode of accepting multicast frames */
    54 #define RTL8139_RCR_MCAST_DEFAULT 0
     56#define RTL8139_RCR_MCAST_DEFAULT  0
     57
    5558/** The default mode of accepting broadcast frames */
    56 #define RTL8139_RCR_BCAST_DEFAULT RCR_ACCEPT_BROADCAST
     59#define RTL8139_RCR_BCAST_DEFAULT  RCR_ACCEPT_BROADCAST
     60
    5761/** The default mode of accepting defect frames */
    58 #define RTL8139_RCR_DEFECT_DEFAULT 0
     62#define RTL8139_RCR_DEFECT_DEFAULT  0
    5963
    6064/** Mask for accepting all multicast */
    61 #define RTL8139_MCAST_MASK_PROMISC UINT64_MAX
    62 
    63 /** Data  */
     65#define RTL8139_MCAST_MASK_PROMISC  UINT64_MAX
     66
     67/** Data */
    6468struct rtl8139_rcr_data {
    6569        /** Configuration part of RCR */
     
    134138
    135139        /** Version of RT8139 controller */
    136         enum rtl8139_version_id hw_version;
     140        rtl8139_version_id_t hw_version;
    137141} rtl8139_t;
    138 
    139142
    140143/* ***** Pointers casting - for both amd64 and ia32 ***** */
     
    160163 */
    161164#define IOADDR_TO_PTR(ioaddr) ((void*)((size_t)(ioaddr)))
    162 
    163 
    164165
    165166/* ***** Bit operation macros ***** */
     
    177178 * @return New value
    178179 */
    179 #define bit_set_part_g( src, value, mask, type ) \
     180#define bit_set_part_g(src, value, mask, type) \
    180181        ((type)(((src) & ~((type)(mask))) | ((value) & (type)(mask))))
    181182
     
    237238        bit_set_part_32(tsd_value, (size) << TSD_SIZE_SHIFT, TSD_SIZE_MASK << TSD_SIZE_SHIFT)
    238239
    239 
    240240#endif
  • uspace/drv/nic/rtl8139/general.h

    r3ce5162 r5c5f522  
    3737#include <unistd.h>
    3838
    39 extern void* rtl8139_memcpy_wrapped(void *dest, const void *src_buf,
    40     size_t src_offset, size_t src_size, size_t data_size);
    41 
     39/** Number of microseconds in second */
     40#define RTL8139_USEC_IN_SEC  1000000
    4241
    4342/** Structure for HW timer control */
    44 typedef struct rtl8139_timer_act {
     43typedef struct {
    4544        /** Register value set in the last timer period */
    4645        uint32_t last_val;
     46       
    4747        /** Register value set in the common timer period */
    4848        uint32_t full_val;
    49 
     49       
    5050        /** Amount of full register periods in timer period */
    5151        size_t full_skips;
     52       
    5253        /** Remaining full register periods to the next period end */
    5354        size_t full_skips_remains;
     55       
    5456        /** Mark if there is a last run */
    5557        int last_run;
    5658} rtl8139_timer_act_t;
    5759
    58 /** Count of microseconds in second */
    59 #define RTL8139_USEC_IN_SEC 1000000
    60 
    61 extern int rtl8139_timer_act_init(rtl8139_timer_act_t *ta, uint32_t timer_freq,
    62     const struct timeval *time);
    63 extern int rtl8139_timer_act_step(rtl8139_timer_act_t *ta, uint32_t *new_reg);
    64 
     60extern void *rtl8139_memcpy_wrapped(void *, const void *, size_t, size_t,
     61    size_t);
     62extern int rtl8139_timer_act_init(rtl8139_timer_act_t *, uint32_t,
     63    const struct timeval *);
     64extern int rtl8139_timer_act_step(rtl8139_timer_act_t *, uint32_t *);
    6565
    6666#endif
Note: See TracChangeset for help on using the changeset viewer.