Changeset 56db65d in mainline for uspace/drv/bus/usb/xhci/rh.c


Ignore:
Timestamp:
2017-10-24T11:06:32Z (6 years ago)
Author:
Ondřej Hlavatý <aearsis@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
0206d35
Parents:
894f58c
Message:

usbhost: provide usb_endpoint_desc_t to bus when registering endpoint

This finishes the path of arbitrary information fetched from device all the way down to registering the endpoint in the bus.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/usb/xhci/rh.c

    r894f58c r56db65d  
    9090}
    9191
     92/* FIXME Are these really static? Older HCs fetch it from descriptor. */
     93/* FIXME Add USB3 options, if applicable. */
     94static const usb_endpoint_desc_t ep0_desc = {
     95        .endpoint_no = 0,
     96        .direction = USB_DIRECTION_BOTH,
     97        .transfer_type = USB_TRANSFER_CONTROL,
     98        .max_packet_size = CTRL_PIPE_MIN_PACKET_SIZE,
     99        .packets = 1,
     100};
     101
    92102// TODO: This currently assumes the device is attached to rh directly.
    93103//       Also, we should consider moving a lot of functionailty to xhci bus
     
    112122
    113123        xhci_endpoint_t *ep0 = xhci_endpoint_get(ep0_base);
    114         /* FIXME: Sync this with xhci_device_add_endpoint. */
    115         ep0->max_streams = 0;
    116         ep0->max_burst = 0;
    117         ep0->mult = 0;
    118124
    119125        if ((err = xhci_endpoint_alloc_transfer_ds(ep0)))
     
    144150        fibril_mutex_unlock(&dev->guard);
    145151
    146         // XXX: Going around bus, duplicating code
    147152        ep0_base->device = dev;
    148         ep0_base->target.address = dev->address;
    149         ep0_base->target.endpoint = 0;
    150         ep0_base->direction = USB_DIRECTION_BOTH;
    151         ep0_base->transfer_type = USB_TRANSFER_CONTROL;
    152         ep0_base->max_packet_size = CTRL_PIPE_MIN_PACKET_SIZE;
    153         ep0_base->packets = 1;
    154         ep0_base->bandwidth = CTRL_PIPE_MIN_PACKET_SIZE;
    155 
    156         bus_register_endpoint(&rh->hc->bus.base, ep0_base);
     153
     154        bus_register_endpoint(&rh->hc->bus.base, ep0_base, &ep0_desc);
    157155
    158156        if (!rh->devices[dev->port - 1]) {
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