Fork us on GitHub Follow us on Facebook Follow us on Twitter

Changeset 561c301 in mainline


Ignore:
Timestamp:
2013-09-11T23:08:47Z (8 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master
Children:
7d771d5
Parents:
e88f3e9
Message:

remove ISA-specific stuff from the comments of generic functions
do not check whether the return value of async_exchange_begin() is NULL (the functions working with the exchange can handle it gracefully)
coding style

Location:
uspace
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/isa/i8237.c

    re88f3e9 r561c301  
    279279 *
    280280 * @return Error code.
     281 *
    281282 */
    282283static inline int dma_controller_init(dma_controller_t *controller)
  • uspace/lib/c/generic/device/hw_res.c

    re88f3e9 r561c301  
    4444       
    4545        async_exch_t *exch = async_exchange_begin(sess);
    46         if (exch == NULL)
    47                 return ENOMEM;
     46       
    4847        int rc = async_req_1_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
    4948            HW_RES_GET_RESOURCE_LIST, &count);
     
    7978{
    8079        async_exch_t *exch = async_exchange_begin(sess);
    81         if (exch == NULL)
    82                 return false;
     80       
    8381        int rc = async_req_1_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
    8482            HW_RES_ENABLE_INTERRUPT);
     
    8886}
    8987
    90 /**
    91  * Setup DMA channel to specified place and mode.
    92  * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit.
    93  * @param pa Physical address of the buffer. Must be < 16MB for 16 bit and < 1MB
    94  *           for 8 bit transfers.
    95  * @param size DMA buffer size, limited to 64K.
    96  * @param mode Mode of the DMA channel:
    97  *              - Read or Write
    98  *              - Allow automatic reset
    99  *              - Use address decrement instead of increment
    100  *              - Use SINGLE/BLOCK/ON DEMAND transfer mode
     88/** Setup DMA channel to specified place and mode.
     89 *
     90 * @param channel DMA channel.
     91 * @param pa      Physical address of the buffer.
     92 * @param size    DMA buffer size.
     93 * @param mode    Mode of the DMA channel:
     94 *                 - Read or Write
     95 *                 - Allow automatic reset
     96 *                 - Use address decrement instead of increment
     97 *                 - Use SINGLE/BLOCK/ON DEMAND transfer mode
     98 *
    10199 * @return Error code.
     100 *
    102101 */
    103102int hw_res_dma_channel_setup(async_sess_t *sess,
     
    105104{
    106105        async_exch_t *exch = async_exchange_begin(sess);
    107         if (exch == NULL)
    108                 return ENOMEM;
     106       
    109107        const uint32_t packed = (channel & 0xffff) | (mode << 16);
    110108        const int ret = async_req_4_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
    111109            HW_RES_DMA_CHANNEL_SETUP, packed, pa, size);
     110       
    112111        async_exchange_end(exch);
    113 
     112       
    114113        return ret;
    115114}
    116115
    117 /**
    118  * Query remaining bytes in the buffer.
    119  * @param channel DMA Channel 1,2,3 for 8 bit transfers, 5,6,7 for 16 bit.
    120  * @return Number of bytes remaining in the buffer(>=0) or error code(<0).
     116/** Query remaining bytes in the buffer.
     117 *
     118 * @param channel DMA channel.
     119 *
     120 * @return Number of bytes remaining in the buffer if positive.
     121 * @return Error code if negative.
     122 *
    121123 */
    122124int hw_res_dma_channel_remain(async_sess_t *sess, unsigned channel)
    123125{
    124126        async_exch_t *exch = async_exchange_begin(sess);
    125         if (exch == NULL)
    126                 return ENOMEM;
     127       
    127128        sysarg_t remain;
    128129        const int ret = async_req_2_1(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
    129130            HW_RES_DMA_CHANNEL_REMAIN, channel, &remain);
     131       
    130132        async_exchange_end(exch);
     133       
    131134        if (ret == EOK)
    132135                return remain;
     136       
    133137        return ret;
    134138}
Note: See TracChangeset for help on using the changeset viewer.