Changeset 4d02595 in mainline

Timestamp:

2012-04-02T22:45:50Z (12 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

6b3ee0c5

Parents:

1bd99214

Message:

arm32, boot: Turn on caching and alignment, in addition to paging.

This should speed things up a little.

Location:

boot/arch/arm32

Files:

• include/mm.h (modified) (1 diff)
• src/mm.c (modified) (4 diffs)

boot/arch/arm32/include/mm.h

@@ -58 +58 @@
         unsigned int bufferable : 1;
         unsigned int cacheable : 1;
-        unsigned int impl_specific : 1;
+        unsigned int xn : 1;
         unsigned int domain : 4;
         unsigned int should_be_zero_1 : 1;
-        unsigned int access_permission : 2;
-        unsigned int should_be_zero_2 : 8;
+        unsigned int access_permission_0 : 2;
+        unsigned int tex : 3;
+        unsigned int access_permission_1 : 2;
+        unsigned int non_global : 1;
+        unsigned int should_be_zero_2 : 1;
+        unsigned int non_secure : 1;
         unsigned int section_base_addr : 12;
 } __attribute__((packed)) pte_level0_section_t;

boot/arch/arm32/src/mm.c

@@ -54 +54 @@
 {
         pte->descriptor_type = PTE_DESCRIPTOR_SECTION;
-        pte->bufferable = 0;
+        pte->bufferable = 1;
         pte->cacheable = 0;
-        pte->impl_specific = 0;
+        pte->xn = 0;
         pte->domain = 0;
         pte->should_be_zero_1 = 0;
-        pte->access_permission = PTE_AP_USER_NO_KERNEL_RW;
+        pte->access_permission_0 = PTE_AP_USER_NO_KERNEL_RW;
+        pte->tex = 0;
+        pte->access_permission_1 = 0;
+        pte->non_global = 0;
         pte->should_be_zero_2 = 0;
+        pte->non_secure = 0;
         pte->section_base_addr = frame;
 }
@@ -67 +71 @@
 static void init_boot_pt(void)
 {
-/* BeagleBoard-xM (MD37x) memory starts at 2GB border,
- * thus mapping only lower 2GB is not not enough.
- * Map entire AS 1:1 instead and hope it works. */
-#ifdef MACHINE_beagleboardxm
         const pfn_t split_page = PTL0_ENTRIES;
-#else
-        const pfn_t split_page = 0x800;
-#endif
         /* Create 1:1 virtual-physical mapping (in lower 2 GB). */
         pfn_t page;
@@ -84 +81 @@
          * (upper 2 GB), physical addresses start from 0.
          */
+        /* BeagleBoard-xM (MD37x) memory starts at 2GB border,
+         * thus mapping only lower 2GB is not not enough.
+         * Map entire AS 1:1 instead and hope it works. */
         for (page = split_page; page < PTL0_ENTRIES; page++)
+#ifndef MACHINE_beagleboardxm
                 init_ptl0_section(&boot_pt[page], page - split_page);
+#else
+                init_ptl0_section(&boot_pt[page], page);
+#endif
         
         asm volatile (
@@ -106 +110 @@
                 "mrc p15, 0, r0, c1, c0, 0\n"
                 
-                /* Mask to enable paging */
-                "ldr r1, =0x00000001\n"
+                /* Mask to enable paging, alignment and caching */
+                "ldr r1, =0x00000007\n"
                 "orr r0, r0, r1\n"