Changeset 467f0c0 in mainline for kernel/arch/arm32/include/barrier.h


Ignore:
Timestamp:
2013-01-10T20:53:07Z (11 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
1f271d9
Parents:
6a6ebde
Message:

arm32: Only check cpacr on armv7. Earlier versions do not support the reg.

Add note about user level synchs to barrier.h

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/arm32/include/barrier.h

    r6a6ebde r467f0c0  
    3939/*
    4040 * TODO: implement true ARM memory barriers for macros below.
     41 * ARMv6 introduced user access of the following commands:
     42 * • Prefetch flush
     43 * • Data synchronization barrier
     44 * • Data memory barrier
     45 * • Clean and prefetch range operations.
     46 * ARM Architecture Reference Manual version I ch. B.3.2.1 p. B3-4
    4147 */
    4248#define CS_ENTER_BARRIER()  asm volatile ("" ::: "memory")
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