Changeset 467f0c0 in mainline


Ignore:
Timestamp:
2013-01-10T20:53:07Z (11 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
1f271d9
Parents:
6a6ebde
Message:

arm32: Only check cpacr on armv7. Earlier versions do not support the reg.

Add note about user level synchs to barrier.h

Location:
kernel/arch/arm32
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/arm32/include/barrier.h

    r6a6ebde r467f0c0  
    3939/*
    4040 * TODO: implement true ARM memory barriers for macros below.
     41 * ARMv6 introduced user access of the following commands:
     42 * • Prefetch flush
     43 * • Data synchronization barrier
     44 * • Data memory barrier
     45 * • Clean and prefetch range operations.
     46 * ARM Architecture Reference Manual version I ch. B.3.2.1 p. B3-4
    4147 */
    4248#define CS_ENTER_BARRIER()  asm volatile ("" ::: "memory")
  • kernel/arch/arm32/src/fpu_context.c

    r6a6ebde r467f0c0  
    125125static int fpu_have_coprocessor_access()
    126126{
     127/* The register containing the information (CPACR) is not available on armv6-
     128 * rely on user decision to use CONFIG_FPU.
     129 */
     130#ifndef PROCESSOR_armv7_a
     131        return 1;
     132#endif
    127133        uint32_t cpacr;
    128134        asm volatile ("MRC p15, 0, %0, c1, c0, 2" :"=r" (cpacr)::);
     
    149155static void fpu_enable_coprocessor_access()
    150156{
     157/* The register containing the information (CPACR) is not available on armv6-
     158 * rely on user decision to use CONFIG_FPU.
     159 */
     160#ifndef PROCESSOR_armv7_a
     161        return;
     162#endif
    151163        uint32_t cpr;
    152164        asm volatile("MRC p15, 0, %0, c1, c1, 0" : "=r" (cpr)::);
     
    169181        uint32_t cpacr;
    170182        asm volatile ("mrc p15, 0, %0, c1, c0, 2" :"=r" (cpacr)::);
     183        printf("CPACR before: %x\n", cpacr);
    171184        /* FPU needs access to coprocessor 10 and 11.
    172185         * Moreover, they need to have same access enabled */
     
    174187        cpacr |= CPACR_CP11_USER_ACCESS;
    175188        asm volatile ("mcr p15, 0, %0, c1, c0, 2" :"=r" (cpacr)::);
     189        printf("CPACR after: %x\n", cpacr);
    176190
    177191#ifdef MACHINE_beagleboardxm
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