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Changeset 3daba42e in mainline


Ignore:
Timestamp:
2019-04-06T09:27:04Z (22 months ago)
Author:
Jakub Jermar <jakub@…>
Branches:
master
Children:
3b81644b, 3d0fd0d
Parents:
534bcdf
Message:

Always chain pic0 and pic1 using IRQ 2

Location:
kernel
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/amd64/src/amd64.c

    r534bcdf r3daba42e  
    121121                /* PIC */
    122122                i8259_init((i8259_t *) I8259_PIC0_BASE,
    123                     (i8259_t *) I8259_PIC1_BASE, IRQ_PIC1, IVT_IRQBASE);
     123                    (i8259_t *) I8259_PIC1_BASE, IVT_IRQBASE);
    124124
    125125                /*
  • kernel/arch/ia32/src/ia32.c

    r534bcdf r3daba42e  
    110110                /* PIC */
    111111                i8259_init((i8259_t *) I8259_PIC0_BASE,
    112                     (i8259_t *) I8259_PIC1_BASE, IRQ_PIC1, IVT_IRQBASE);
     112                    (i8259_t *) I8259_PIC1_BASE, IVT_IRQBASE);
    113113
    114114                /*
  • kernel/arch/mips32/src/mach/malta/malta.c

    r534bcdf r3daba42e  
    9999        irq_init(ISA_IRQ_COUNT, ISA_IRQ_COUNT);
    100100
    101         i8259_init((i8259_t *) PIC0_BASE, (i8259_t *) PIC1_BASE, 2, 0);
     101        i8259_init((i8259_t *) PIC0_BASE, (i8259_t *) PIC1_BASE, 0);
    102102
    103103        int_handler[INT_HW0] = malta_isa_irq_handler;
  • kernel/genarch/include/genarch/drivers/i8259/i8259.h

    r534bcdf r3daba42e  
    5252#define PIC_OCW4_NSEOI     (1 << 5)
    5353
    54 #define PIC_IRQ_COUNT      8
    55 #define PIC_SPURIOUS_IRQ   7
     54#define PIC0_IRQ_COUNT      8
     55#define PIC1_IRQ_COUNT      8
     56
     57#define PIC0_IRQ_PIC1       2
    5658
    5759typedef struct {
     
    6062} __attribute__((packed)) i8259_t;
    6163
    62 extern void i8259_init(i8259_t *, i8259_t *, inr_t, unsigned int);
     64extern void i8259_init(i8259_t *, i8259_t *, unsigned int);
    6365extern void pic_enable_irqs(uint16_t);
    6466extern void pic_disable_irqs(uint16_t);
  • kernel/genarch/src/drivers/i8259/i8259.c

    r534bcdf r3daba42e  
    4747static i8259_t *saved_pic1;
    4848
    49 void i8259_init(i8259_t *pic0, i8259_t *pic1, inr_t pic1_irq,
    50     unsigned int irq0_vec)
     49void i8259_init(i8259_t *pic0, i8259_t *pic1, unsigned int irq0_vec)
    5150{
    5251        saved_pic0 = pic0;
     
    5958        pio_write_8(&pic0->port2, irq0_vec);
    6059
    61         /* ICW3: pic1 using IRQ IRQ_PIC1 */
    62         pio_write_8(&pic0->port2, 1 << pic1_irq);
     60        /* ICW3: pic1 using IRQ PIC0_IRQ_PIC1 */
     61        pio_write_8(&pic0->port2, 1 << PIC0_IRQ_PIC1);
    6362
    6463        /* ICW4: i8086 mode */
     
    6968
    7069        /* ICW2: IRQ 8 maps to interrupt vector address irq0_vec + 8 */
    71         pio_write_8(&pic1->port2, irq0_vec + PIC_IRQ_COUNT);
     70        pio_write_8(&pic1->port2, irq0_vec + PIC0_IRQ_COUNT);
    7271
    73         /* ICW3: pic1 is known as IRQ_PIC1 */
    74         pio_write_8(&pic1->port2, pic1_irq);
     72        /* ICW3: pic1 is known as PIC0_IRQ_PIC1 */
     73        pio_write_8(&pic1->port2, PIC0_IRQ_PIC1);
    7574
    7675        /* ICW4: i8086 mode */
     
    7877
    7978        pic_disable_irqs(0xffff);               /* disable all irq's */
    80         pic_enable_irqs(1 << pic1_irq);         /* but enable pic1_irq */
     79        pic_enable_irqs(1 << PIC0_IRQ_PIC1);    /* but enable PIC0_IRQ_PIC1 */
    8180}
    8281
     
    9089                    (uint8_t) (x & (~(irqmask & 0xff))));
    9190        }
    92         if (irqmask >> PIC_IRQ_COUNT) {
     91        if (irqmask >> PIC0_IRQ_COUNT) {
    9392                x = pio_read_8(&saved_pic1->port2);
    9493                pio_write_8(&saved_pic1->port2,
    95                     (uint8_t) (x & (~(irqmask >> PIC_IRQ_COUNT))));
     94                    (uint8_t) (x & (~(irqmask >> PIC0_IRQ_COUNT))));
    9695        }
    9796}
     
    106105                    (uint8_t) (x | (irqmask & 0xff)));
    107106        }
    108         if (irqmask >> PIC_IRQ_COUNT) {
     107        if (irqmask >> PIC0_IRQ_COUNT) {
    109108                x = pio_read_8(&saved_pic1->port2);
    110109                pio_write_8(&saved_pic1->port2,
    111                     (uint8_t) (x | (irqmask >> PIC_IRQ_COUNT)));
     110                    (uint8_t) (x | (irqmask >> PIC0_IRQ_COUNT)));
    112111        }
    113112}
     
    115114void pic_eoi(unsigned int irq)
    116115{
    117         if (irq >= PIC_IRQ_COUNT)
     116        if (irq >= PIC0_IRQ_COUNT)
    118117                pio_write_8(&saved_pic1->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
    119118        pio_write_8(&saved_pic0->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
     
    126125        uint8_t isr_lo = pio_read_8(&saved_pic0->port1);
    127126        uint8_t isr_hi = pio_read_8(&saved_pic1->port1);
    128         return !(((isr_hi << PIC_IRQ_COUNT) | isr_lo) & (1 << irq));
     127        return !(((isr_hi << PIC0_IRQ_COUNT) | isr_lo) & (1 << irq));
    129128}
    130129
     
    132131{
    133132        /* For spurious IRQs from pic1, we need to isssue an EOI to pic0 */
    134         if (irq >= PIC_IRQ_COUNT)
     133        if (irq >= PIC0_IRQ_COUNT)
    135134                pio_write_8(&saved_pic0->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
    136135}
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