Changeset 370a1c8 in mainline for uspace/drv/bus/usb/xhci/rh.c
- Timestamp:
- 2017-10-02T16:10:28Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 04df063
- Parents:
- 4688350b
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/xhci/rh.c
r4688350b r370a1c8 40 40 #include "debug.h" 41 41 #include "commands.h" 42 #include "endpoint.h" 42 43 #include "hc.h" 43 44 #include "hw_struct/trb.h" … … 58 59 // TODO: Check device deallocation, we free device_ctx in hc.c, not 59 60 // sure about the other structs. 60 static int alloc_dev(xhci_hc_t *hc, uint8_t port )61 static int alloc_dev(xhci_hc_t *hc, uint8_t port, uint32_t route_str) 61 62 { 62 63 int err; … … 67 68 68 69 xhci_send_enable_slot_command(hc, cmd); 69 if ((err = xhci_wait_for_command(cmd, 100000)) != EOK) 70 if ((err = xhci_wait_for_command(cmd, 100000)) != EOK) { 71 usb_log_error("Failed to enable a slot for the device."); 70 72 goto err_command; 73 } 71 74 72 75 uint32_t slot_id = cmd->slot_id; … … 91 94 XHCI_SLOT_ROOT_HUB_PORT_SET(ictx->slot_ctx, port); 92 95 XHCI_SLOT_CTX_ENTRIES_SET(ictx->slot_ctx, 1); 93 94 // TODO: where do we save this? the ring should be associated with device structure somewhere 96 XHCI_SLOT_ROUTE_STRING_SET(ictx->slot_ctx, route_str); 97 95 98 xhci_trb_ring_t *ep_ring = malloc32(sizeof(xhci_trb_ring_t)); 96 99 if (!ep_ring) { … … 103 106 goto err_ring; 104 107 105 xhci_port_regs_t *regs = &hc->op_regs->portrs[port - 1]; 106 uint8_t port_speed_id = XHCI_REG_RD(regs, XHCI_PORT_PS); 107 108 XHCI_EP_TYPE_SET(ictx->endpoint_ctx[0], 4); 108 XHCI_EP_TYPE_SET(ictx->endpoint_ctx[0], EP_TYPE_CONTROL); 109 // TODO: must be changed with a command after USB descriptor is read 110 // See 4.6.5 in XHCI specification, first note 109 111 XHCI_EP_MAX_PACKET_SIZE_SET(ictx->endpoint_ctx[0], 110 hc->speeds[port_speed_id].tx_bps);112 xhci_is_usb3_port(&hc->rh, port) ? 512 : 8); 111 113 XHCI_EP_MAX_BURST_SIZE_SET(ictx->endpoint_ctx[0], 0); 114 /* FIXME physical pointer? */ 112 115 XHCI_EP_TR_DPTR_SET(ictx->endpoint_ctx[0], ep_ring->dequeue); 113 116 XHCI_EP_DCS_SET(ictx->endpoint_ctx[0], 1); … … 139 142 ictx = NULL; 140 143 141 144 // TODO: Issue configure endpoint commands (sec 4.3.5). 142 145 143 146 return EOK; … … 171 174 uint8_t link_state = XHCI_REG_RD(regs, XHCI_PORT_PLS); 172 175 // FIXME: do we have a better way to detect if this is usb2 or usb3 device? 173 if (link_state == 0) { 174 /* USB3 is automatically advanced to enabled. */ 175 uint8_t port_speed = XHCI_REG_RD(regs, XHCI_PORT_PS); 176 usb_log_debug2("Detected new device on port %u, port speed id %u.", port_id, port_speed); 177 178 alloc_dev(hc, port_id); 179 } else if (link_state == 5) { 180 /* USB 3 failed to enable. */ 181 usb_log_debug("USB 3 port couldn't be enabled."); 182 } else if (link_state == 7) { 176 if (xhci_is_usb3_port(&hc->rh, port_id)) { 177 if(link_state == 0) { 178 /* USB3 is automatically advanced to enabled. */ 179 uint8_t port_speed = XHCI_REG_RD(regs, XHCI_PORT_PS); 180 usb_log_debug("Detected new device on port %u, port speed id %u.", port_id, port_speed); 181 182 alloc_dev(hc, port_id, 0); 183 } 184 else if (link_state == 5) { 185 /* USB 3 failed to enable. */ 186 usb_log_error("USB 3 port couldn't be enabled."); 187 } 188 else { 189 usb_log_error("USB 3 port is in invalid state %u.", link_state); 190 } 191 } 192 else { 183 193 usb_log_debug("USB 2 device attached, issuing reset."); 184 194 xhci_reset_hub_port(hc, port_id); 195 /* 196 FIXME: we need to wait for the event triggered by the reset 197 and then alloc_dev()... can't it be done directly instead of 198 going around? 199 */ 185 200 } 186 201 … … 201 216 uint8_t port_speed = XHCI_REG_RD(regs, XHCI_PORT_PS); 202 217 usb_log_debug2("Detected port reset on port %u, port speed id %u.", port_id, port_speed); 203 alloc_dev(hc, port_id); 218 /** FIXME: only if that port is not yet initialized */ 219 alloc_dev(hc, port_id, 0); 204 220 } 205 221
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