Ignore:
Timestamp:
2007-04-09T16:21:47Z (17 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
ec5b3204
Parents:
183788f1
Message:

Fix a nasty bug in the TLB miss handlers on sparc64.
After we no longer lock the kernel stack in the DTLB,
there is a real danger of nested DTLB misses. The nested
miss can very easily clobber the DTLB Tag Access register.
Therefore, the original miss may not read this register, but
it has to receive its value as an argument. The argument
value is saved in the trap table when it is guaranteed that
the nested TLB miss will not occur.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/sparc64/include/trap/mmu.h

    r183788f1 r36f19c0  
    130130.endif
    131131
     132        /*
     133         * Switch from the MM globals.
     134         */
    132135        wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
     136
     137        /*
     138         * Read the Tag Access register for the higher-level handler.
     139         * This is necessary to survive nested DTLB misses.
     140         */     
     141        mov VA_DMMU_TAG_ACCESS, %g2
     142        ldxa [%g2] ASI_DMMU, %g2
     143
     144        /*
     145         * g2 will be passed as an argument to fast_data_access_mmu_miss().
     146         */
    133147        PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
    134148.endm
     
    143157.endif
    144158
     159        /*
     160         * Switch from the MM globals.
     161         */
    145162        wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
     163
     164        /*
     165         * Read the Tag Access register for the higher-level handler.
     166         * This is necessary to survive nested DTLB misses.
     167         */     
     168        mov VA_DMMU_TAG_ACCESS, %g2
     169        ldxa [%g2] ASI_DMMU, %g2
     170
     171        /*
     172         * g2 will be passed as an argument to fast_data_access_mmu_miss().
     173         */
    146174        PREEMPTIBLE_HANDLER fast_data_access_protection
    147175.endm
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