Index: uspace/drv/uhci-hcd/hc.c
===================================================================
--- uspace/drv/uhci-hcd/hc.c	(revision af81980c9695b76a57ce275e167265faee365a68)
+++ uspace/drv/uhci-hcd/hc.c	(revision 302a4b64d3ff79b5f1924d45ec0de24c7a2ea9fc)
@@ -44,6 +44,7 @@
 #include "hc.h"
 
-#define UHCI_SUPPORTED_INTERRUPTS \
+#define UHCI_STATUS_ALLOW_INTERRUPTS \
     (UHCI_INTR_CRC | UHCI_INTR_COMPLETE | UHCI_INTR_SHORT_PACKET)
+
 
 static int hc_init_transfer_lists(hc_t *instance);
@@ -138,5 +139,5 @@
 		/* Enable all interrupts, but resume interrupt */
 		pio_write_16(&instance->registers->usbintr,
-		    UHCI_SUPPORTED_INTERRUPTS);
+		    UHCI_STATUS_ALLOW_INTERRUPTS);
 	}
 
@@ -182,5 +183,5 @@
 		instance->interrupt_commands[1].cmd = CMD_BTEST;
 		instance->interrupt_commands[1].value =
-		    UHCI_SUPPORTED_INTERRUPTS;
+		    UHCI_STATUS_ALLOW_INTERRUPTS | UHCI_STATUS_NM_INTERRUPTS;
 		instance->interrupt_commands[1].srcarg = 1;
 		instance->interrupt_commands[1].dstarg = 2;
@@ -215,7 +216,6 @@
 
 	/* Set all frames to point to the first queue head */
-	const uint32_t queue =
-	    LINK_POINTER_QH(addr_to_phys(
-	        instance->transfers_interrupt.queue_head));
+	const uint32_t queue = LINK_POINTER_QH(
+	        addr_to_phys(instance->transfers_interrupt.queue_head));
 
 	unsigned i = 0;
@@ -279,5 +279,5 @@
 #ifdef FSBR
 	transfer_list_set_next(&instance->transfers_bulk_full,
-		&instance->transfers_control_full);
+	    &instance->transfers_control_full);
 #endif
 
@@ -332,4 +332,5 @@
 {
 	assert(instance);
+	usb_log_info("Got interrupt: %x.\n", status);
 	/* Lower 2 bits are transaction error and transaction complete */
 	if (status & (UHCI_STATUS_INTERRUPT | UHCI_STATUS_ERROR_INTERRUPT)) {
@@ -353,4 +354,7 @@
 	}
 	/* Resume interrupts are not supported */
+	if (status & UHCI_STATUS_RESUME) {
+		usb_log_error("Resume interrupt!\n");
+	}
 
 	/* Bits 4 and 5 indicate hc error */
Index: uspace/drv/uhci-hcd/hc.h
===================================================================
--- uspace/drv/uhci-hcd/hc.h	(revision af81980c9695b76a57ce275e167265faee365a68)
+++ uspace/drv/uhci-hcd/hc.h	(revision 302a4b64d3ff79b5f1924d45ec0de24c7a2ea9fc)
@@ -69,4 +69,6 @@
 #define UHCI_STATUS_ERROR_INTERRUPT (1 << 1)
 #define UHCI_STATUS_INTERRUPT (1 << 0)
+#define UHCI_STATUS_NM_INTERRUPTS \
+    (UHCI_STATUS_PROCESS_ERROR | UHCI_STATUS_SYSTEM_ERROR)
 
 	/** Interrupt enabled registers */
