Changeset 235d31d in mainline for kernel/arch/sparc64/src/trap/interrupt.c

Timestamp:

2014-12-22T17:47:40Z (9 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

8c7d5ad

Parents:

eae91e0 (diff), 759ea0d (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge the CHT pre-integration branch

This branch contains:

• the merge of lp:~adam-hraska+lp/helenos/rcu, which brings:

• a new preemptible kernel RCU variant called A-RCU,
• a preemptible variant of Podzimek's non-preemptible kernel RCU and
• a new variant of usersace RCU,
• a new concurrent hash table (CHT) implementation based on RCU,
• a deployment of CHT in kernel futex handling,
• a deployment of the userspace RCU in the implementation of upgradable futexes,

all described in Adam Hraska's master thesis named Read-Copy-Update
for HelenOS, defended in 2013 at MFF UK; furthemore, the branch
fixes two synchronization bugs in condvars and waitq, respectively:

• revid:adam.hraska+hos@gmail.com-20121116144921-3to9u1tn1sg07rg7
• revid:adam.hraska+hos@gmail.com-20121116173623-km7gwtqixwudpe66

• build fixes required to pass make check
• overhaul of ia64 and sparc64 trap handling, to allow exc_dispatch() to be used now when the kernel is more picky about CPU state accounting
• an important fix of the sparc64/sun4v preemptible trap handler
• various other fixes of issues discovered on non-x86 architectures

File:

• kernel/arch/sparc64/src/trap/interrupt.c (modified) (3 diffs)

kernel/arch/sparc64/src/trap/interrupt.c

@@ -36 +36 @@
 #include <arch/interrupt.h>
 #include <arch/trap/interrupt.h>
+#include <arch/trap/exception.h>
+#include <arch/trap/mmu.h>
 #include <arch/sparc64.h>
 #include <interrupt.h>
@@ -43 +45 @@
 #include <arch/asm.h>
 #include <arch/barrier.h>
+#include <arch/drivers/tick.h>
 #include <print.h>
 #include <arch.h>
@@ -49 +52 @@
 #include <synch/spinlock.h>
 
-/** Register Interrupt Level Handler.
- *
- * @param n       Interrupt Level (1 - 15).
- * @param name    Short descriptive string.
- * @param handler Handler.
- *
- */
-void interrupt_register(unsigned int n, const char *name, iroutine_t handler)
+void exc_arch_init(void)
 {
-        ASSERT(n >= IVT_FIRST);
-        ASSERT(n <= IVT_ITEMS);
-        
-        exc_register(n - IVT_FIRST, name, true, handler);
+        exc_register(TT_INSTRUCTION_ACCESS_EXCEPTION,
+            "instruction_access_exception", false,
+            instruction_access_exception);
+        exc_register(TT_INSTRUCTION_ACCESS_ERROR,
+            "instruction_access_error", false,
+            instruction_access_error);
+
+#ifdef SUN4V
+        exc_register(TT_IAE_UNAUTH_ACCESS,
+            "iae_unauth_access", false,
+            instruction_access_exception);
+        exc_register(TT_IAE_NFO_PAGE,
+            "iae_nfo_page", false,
+            instruction_access_exception);
+#endif
+
+        exc_register(TT_ILLEGAL_INSTRUCTION,
+            "illegal_instruction", false,
+            illegal_instruction);
+        exc_register(TT_PRIVILEGED_OPCODE,
+            "privileged_opcode", false,
+            privileged_opcode);
+        exc_register(TT_UNIMPLEMENTED_LDD,
+            "unimplemented_LDD", false,
+            unimplemented_LDD);
+        exc_register(TT_UNIMPLEMENTED_STD,
+            "unimplemented_STD", false,
+            unimplemented_STD);
+
+#ifdef SUN4V
+        exc_register(TT_DAE_INVALID_ASI,
+            "dae_invalid_asi", false,
+            data_access_exception);
+        exc_register(TT_DAE_PRIVILEGE_VIOLATION,
+            "dae_privilege_violation", false,
+            data_access_exception);
+        exc_register(TT_DAE_NC_PAGE,
+            "dae_nc_page", false,
+            data_access_exception);
+        exc_register(TT_DAE_NC_PAGE,
+            "dae_nc_page", false,
+            data_access_exception);
+        exc_register(TT_DAE_NFO_PAGE,
+            "dae_nfo_page", false,
+            data_access_exception);
+#endif
+
+        exc_register(TT_FP_DISABLED,
+            "fp_disabled", true,
+            fp_disabled);
+        exc_register(TT_FP_EXCEPTION_IEEE_754,
+            "fp_exception_ieee_754", false,
+            fp_exception_ieee_754);
+        exc_register(TT_FP_EXCEPTION_OTHER,
+            "fp_exception_other", false,
+            fp_exception_other);
+        exc_register(TT_TAG_OVERFLOW,
+            "tag_overflow", false,
+            tag_overflow);      
+        exc_register(TT_DIVISION_BY_ZERO,
+            "division_by_zero", false,
+            division_by_zero);
+        exc_register(TT_DATA_ACCESS_EXCEPTION,
+            "data_access_exception", false,
+            data_access_exception);
+        exc_register(TT_DATA_ACCESS_ERROR,
+            "data_access_error", false,
+            data_access_error);
+        exc_register(TT_MEM_ADDRESS_NOT_ALIGNED,
+            "mem_address_not_aligned", false,
+            mem_address_not_aligned);
+        exc_register(TT_LDDF_MEM_ADDRESS_NOT_ALIGNED,
+            "LDDF_mem_address_not_aligned", false,
+            LDDF_mem_address_not_aligned);
+        exc_register(TT_STDF_MEM_ADDRESS_NOT_ALIGNED,
+            "STDF_mem_address_not_aligned", false,
+            STDF_mem_address_not_aligned);
+        exc_register(TT_PRIVILEGED_ACTION,
+            "privileged_action", false,
+            privileged_action);
+        exc_register(TT_LDQF_MEM_ADDRESS_NOT_ALIGNED,
+            "LDQF_mem_address_not_aligned", false,
+            LDQF_mem_address_not_aligned);
+        exc_register(TT_STQF_MEM_ADDRESS_NOT_ALIGNED,
+            "STQF_mem_address_not_aligned", false,
+            STQF_mem_address_not_aligned);
+
+        exc_register(TT_INTERRUPT_LEVEL_14,
+            "interrupt_level_14", true,
+            tick_interrupt);
+
+#ifdef SUN4U 
+        exc_register(TT_INTERRUPT_VECTOR_TRAP,
+            "interrupt_vector_trap", true,
+            interrupt);
+#endif
+
+        exc_register(TT_FAST_INSTRUCTION_ACCESS_MMU_MISS,
+            "fast_instruction_access_mmu_miss", true,
+            fast_instruction_access_mmu_miss);
+        exc_register(TT_FAST_DATA_ACCESS_MMU_MISS,
+            "fast_data_access_mmu_miss", true,
+            fast_data_access_mmu_miss);
+        exc_register(TT_FAST_DATA_ACCESS_PROTECTION,
+            "fast_data_access_protection", true,
+            fast_data_access_protection);       
+
+#ifdef SUN4V
+        exc_register(TT_CPU_MONDO,
+            "cpu_mondo", true,
+            cpu_mondo);
+#endif
+
 }