Changeset 208b5f5 in mainline for kernel/arch/sparc32/include/arch/barrier.h
- Timestamp:
- 2013-12-29T14:32:55Z (10 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 4c14b88, 6fa9a99d, 9be30cdf, aacdb8e
- Parents:
- 2a13328
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc32/include/arch/barrier.h
r2a13328 r208b5f5 36 36 #define KERN_sparc32_BARRIER_H_ 37 37 38 // FIXME TODO 38 /* 39 * Provisions are made to prevent compiler from reordering instructions itself. 40 */ 39 41 40 #define CS_ENTER_BARRIER() 41 #define CS_LEAVE_BARRIER() 42 #define CS_ENTER_BARRIER() \ 43 asm volatile ( \ 44 "stbar\n" \ 45 ::: "memory" \ 46 ) 42 47 43 #define memory_barrier() 44 #define read_barrier() 45 #define write_barrier() 48 #define CS_LEAVE_BARRIER() \ 49 asm volatile ( \ 50 "stbar\n" \ 51 ::: "memory" \ 52 ) 53 54 #define memory_barrier() \ 55 asm volatile ( \ 56 "stbar\n" \ 57 ::: "memory" \ 58 ) 59 60 #define read_barrier() \ 61 asm volatile ( \ 62 "stbar\n" \ 63 ::: "memory" \ 64 ) 65 66 #define write_barrier() \ 67 asm volatile ( \ 68 "stbar\n" \ 69 ::: "memory" \ 70 ) 46 71 47 72 #define smc_coherence(addr)
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