Changeset 1a5eca4 in mainline for uspace/lib/c/arch/amd64/include/libarch/tls.h

Timestamp:

2016-04-27T19:36:56Z (8 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

af9dd1e

Parents:

d6f9fff

Message:

amd64: Make TLS settable from uspace

The TLS document[1] mandates that %fs[0] is the thread pointer on amd64.
That is good as it allows userspace-only TLS management for fibrils:
fibril_save/restore() simply manipulate the thread pointer in %fs:0 and
don't need to ask the kernel to modify %fs's base. The kernel treats
%fs:0 as another preserved register and preserves it across context
switches. GCC gets in the way a little bit because it by default assumes
that TLS is accessible from negative %fs offsets (which would
necessitate a kernel-assisted solution). Fortunately, there is a GCC
option to suppress this assumption.

• Introduce the concept of virtual registers, with VREG_TP (thread pointer) being the first of them
• Preserve VREG_TP in context_save/restore()
• Stop using sys_tls_set() in favour of using %fs:0 as the thread pointer
• Make GCC generate code that always goes through %gs:0 to access TLS
• Introduce kseg: a per-CPU area accessible from GS_KERNEL that holds the kernel stack, kernel FS base and a scratch space for syscall and int handlers to use

[1] Drepper, U.: ELF Handling For Thread-Local Storage

File:

• uspace/lib/c/arch/amd64/include/libarch/tls.h (modified) (1 diff)

uspace/lib/c/arch/amd64/include/libarch/tls.h

@@ -47 +47 @@
 static inline void __tcb_set(tcb_t *tcb)
 {
-        __SYSCALL1(SYS_TLS_SET, (sysarg_t) tcb);
+        asm volatile ("movq %0, %%fs:0" :: "r" (tcb));
 }
 
-static inline tcb_t * __tcb_get(void)
+static inline tcb_t *__tcb_get(void)
 {
-        void * retval;
+        void *retval;
 
-        asm ("movq %%fs:0, %0" : "=r"(retval));
+        asm volatile ("movq %%fs:0, %0" : "=r" (retval));
         return retval;
 }