Changeset 19b3cc6 in mainline for boot/arch/arm32/src/putchar.c
- Timestamp:
- 2014-01-17T23:12:10Z (10 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade
- Children:
- e26a9d95
- Parents:
- fddffb2 (diff), facc34d (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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- 1 edited
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boot/arch/arm32/src/putchar.c
rfddffb2 r19b3cc6 122 122 #endif 123 123 124 #ifdef MACHINE_raspberrypi 125 126 static int raspi_init; 127 128 static inline void write32(uint32_t addr, uint32_t data) 129 { 130 *(volatile uint32_t *)(addr) = data; 131 } 132 133 static inline uint32_t read32(uint32_t addr) 134 { 135 return *(volatile uint32_t *)(addr); 136 } 137 138 static void scons_init_raspi(void) 139 { 140 write32(BCM2835_UART0_CR, 0x0); /* Disable UART */ 141 write32(BCM2835_UART0_ICR, 0x7f); /* Clear interrupts */ 142 write32(BCM2835_UART0_IBRD, 1); /* Set integer baud rate */ 143 write32(BCM2835_UART0_FBRD, 40); /* Set fractional baud rate */ 144 write32(BCM2835_UART0_LCRH, 145 BCM2835_UART0_LCRH_FEN | /* Enable FIFOs */ 146 BCM2835_UART0_LCRH_WL8); /* Word length: 8 */ 147 write32(BCM2835_UART0_CR, 148 BCM2835_UART0_CR_UARTEN | /* Enable UART */ 149 BCM2835_UART0_CR_TXE | /* Enable TX */ 150 BCM2835_UART0_CR_RXE); /* Enable RX */ 151 } 152 153 static void scons_sendb_raspi(uint8_t byte) 154 { 155 if (!raspi_init) { 156 scons_init_raspi(); 157 raspi_init = 1; 158 } 159 160 while (read32(BCM2835_UART0_FR) & BCM2835_UART0_FR_TXFF); 161 162 write32(BCM2835_UART0_DR, byte); 163 } 164 #endif 165 124 166 /** Send a byte to the serial console. 125 167 * … … 139 181 #ifdef MACHINE_integratorcp 140 182 scons_sendb_icp(byte); 183 #endif 184 #ifdef MACHINE_raspberrypi 185 scons_sendb_raspi(byte); 141 186 #endif 142 187 }
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