Changeset 1720cf9 in mainline for uspace/srv/hw/char/s3c24xx_uart/s3c24xx_uart.c

Timestamp:

2010-07-27T21:29:29Z (14 years ago)

Author:

Jiri Svoboda <jiri@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

07c66cf, 571addd

Parents:

3d9d948

Message:

Fix accidentally disabling FIFO in userspace. Also, log receive errors.

File:

• uspace/srv/hw/char/s3c24xx_uart/s3c24xx_uart.c (modified) (3 diffs)

uspace/srv/hw/char/s3c24xx_uart/s3c24xx_uart.c

@@ -162 +162 @@
         while ((pio_read_32(&uart->io->ufstat) & S3C24XX_UFSTAT_RX_COUNT) != 0) {
                 uint32_t data = pio_read_32(&uart->io->urxh) & 0xff;
-                pio_read_32(&uart->io->uerstat);
+                uint32_t status = pio_read_32(&uart->io->uerstat);
 
                 if (uart->client_phone != -1) {
@@ -168 +168 @@
                             data);
                 }
+
+                if (status & 0x0f)
+                        printf(NAME ": Error status 0x%x\n", status);
         }
 }
@@ -198 +201 @@
         ipc_register_irq(inr, device_assign_devno(), 0, &uart_irq_code);
 
-        /* Disable FIFO */
-        pio_write_32(&uart->io->ufcon,
-            pio_read_32(&uart->io->ufcon) & ~0x01);
+        /* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */
+        pio_write_32(&uart->io->ufcon, 0x01);
 
         /* Set RX interrupt to pulse mode */