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Changeset 13be128d in mainline


Ignore:
Timestamp:
2012-03-10T20:20:16Z (10 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master
Children:
c91fe327
Parents:
590ce352
Message:

amdm37x_irc: Fix padding, const access, and base address.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/genarch/include/drivers/amdm37x_irc/amdm37x_irc.h

    r590ce352 r13be128d  
    3838
    3939/* AMDM37x TRM p. 1079 */
    40 #define AMDM37x_IRC_BASE_ADDRESS 0x4820000
     40#define AMDM37x_IRC_BASE_ADDRESS 0x48200000
    4141#define AMDM37x_IRC_SIZE 4096
    4242
     
    4646
    4747typedef struct {
    48         ioport32_t revision; /**< Revision */
     48        const ioport32_t revision; /**< Revision */
    4949#define AMDM37x_IRC_REV_MASK (0xff)
     50
     51        uint8_t padd0_[12];
    5052
    5153        ioport32_t sysconfig; /**< SYS config */
     
    5355#define AMDM37x_IRC_SYSCONFIG_SOFTRESET_FLAG (1 << 1)
    5456
    55         ioport32_t sysstatus; /**< SYS status */
     57        const ioport32_t sysstatus; /**< SYS status */
    5658#define AMDM37x_IRC_SYSSTATUS_RESET_DONE_FLAG (1 << 0)
    5759
    58         ioport32_t sir_irq;   /**< Currently active irq number */
     60        uint8_t padd1_[40];
     61
     62        const ioport32_t sir_irq;   /**< Currently active irq number */
    5963#define AMDM37x_IRC_SIR_IRQ_ACTIVEIRQ_MASK (0x7f)
    6064#define AMDM37x_IRC_SIR_IRQ_SPURIOUSIRQFLAG_MASK (0xfffffff8)
    6165
    62         ioport32_t sir_fiq;
     66        const ioport32_t sir_fiq;
    6367#define AMDM37x_IRC_SIR_FIQ_ACTIVEIRQ_MASK (0x7f)
    6468#define AMDM37x_IRC_SIR_FIQ_SPURIOUSIRQFLAG_MASK (0xfffffff8)
     
    7478#define AMDM37x_IRC_IDLE_FUNCIDLE_FLAG (1 << 0)
    7579#define AMDM37x_IRC_IDLE_TURBO_FLAG (1 << 1)
     80
     81        uint8_t padd2_[12];
    7682
    7783        ioport32_t irq_priority; /**< Active IRQ priority */
     
    8894#define AMDM37x_IRC_THRESHOLD_PRIORITYTHRESHOLD_DISABLED (0xff)
    8995
    90         ioport32_t dummy_[5];
     96        uint8_t padd3__[20];
     97
    9198        struct {
    92                 ioport32_t itr;   /**< Interrupt input status before masking */
     99                const ioport32_t itr;   /**< Interrupt input status before masking */
    93100                ioport32_t mir;   /**< Interrupt mask */
    94101                ioport32_t mir_clear; /**< Clear mir mask bits */
     
    96103                ioport32_t isr_set;   /**< Set software interrupt bits */
    97104                ioport32_t isr_clear; /**< Clear software interrupt bits */
    98                 ioport32_t pending_irq; /**< IRQ status after masking */
    99                 ioport32_t pending_fiq; /**< FIQ status after masking */
     105                const ioport32_t pending_irq; /**< IRQ status after masking */
     106                const ioport32_t pending_fiq; /**< FIQ status after masking */
    100107        } interrupts[3];
     108
     109        uint8_t padd4_[32];
     110
    101111        ioport32_t ilr[96];   /**< FIQ/IRQ steering */
    102112#define AMDM37x_IRC_ILR_FIQNIRQ (1 << 0)
     
    106116} amdm37x_irc_regs_t;
    107117
     118static inline void amdm37x_irc_dump(amdm37x_irc_regs_t *regs)
     119{
     120#define DUMP_REG(name) \
     121        printf("%s %p(%x).\n", #name, &regs->name, regs->name);
     122
     123        DUMP_REG(revision);
     124        DUMP_REG(sysconfig);
     125        DUMP_REG(sysstatus);
     126        DUMP_REG(sir_irq);
     127        DUMP_REG(sir_fiq);
     128        DUMP_REG(control);
     129        DUMP_REG(protection);
     130        DUMP_REG(idle);
     131        DUMP_REG(irq_priority);
     132        DUMP_REG(fiq_priority);
     133        DUMP_REG(threshold);
     134
     135        for (int i = 0; i < 3; ++i) {
     136                DUMP_REG(interrupts[i].itr);
     137                DUMP_REG(interrupts[i].mir);
     138                DUMP_REG(interrupts[i].isr_set);
     139                DUMP_REG(interrupts[i].pending_irq);
     140                DUMP_REG(interrupts[i].pending_fiq);
     141        }
     142        for (int i = 0; i < AMDM37x_IRC_IRQ_COUNT; ++i) {
     143                DUMP_REG(ilr[i]);
     144        }
     145
     146#undef DUMP_REG
     147}
     148
    108149
    109150static inline void amdm37x_irc_init(amdm37x_irc_regs_t *regs)
    110151{
    111152        /* AMDM37x TRM sec 12.5.1 p. 2425 */
    112 
    113153        /* Program system config register */
    114154        //TODO enable this when you know the meaning
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