Changeset 0b749a3 in mainline for kernel/arch/ia64/include/interrupt.h


Ignore:
Timestamp:
2010-11-22T15:39:53Z (13 years ago)
Author:
Vojtech Horky <vojtechhorky@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
0eddb76, aae339e9
Parents:
9a1d8ab (diff), 8cd1aa5e (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge development/ changes

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia64/include/interrupt.h

    r9a1d8ab r0b749a3  
    3737
    3838#include <typedefs.h>
    39 #include <arch/register.h>
    40 #include <trace.h>
     39#include <arch/istate.h>
    4140
    4241/** ia64 has 256 INRs. */
     
    7473#define EOI  0  /**< The actual value doesn't matter. */
    7574
    76 typedef struct istate {
    77         uint128_t f2;
    78         uint128_t f3;
    79         uint128_t f4;
    80         uint128_t f5;
    81         uint128_t f6;
    82         uint128_t f7;
    83         uint128_t f8;
    84         uint128_t f9;
    85         uint128_t f10;
    86         uint128_t f11;
    87         uint128_t f12;
    88         uint128_t f13;
    89         uint128_t f14;
    90         uint128_t f15;
    91         uint128_t f16;
    92         uint128_t f17;
    93         uint128_t f18;
    94         uint128_t f19;
    95         uint128_t f20;
    96         uint128_t f21;
    97         uint128_t f22;
    98         uint128_t f23;
    99         uint128_t f24;
    100         uint128_t f25;
    101         uint128_t f26;
    102         uint128_t f27;
    103         uint128_t f28;
    104         uint128_t f29;
    105         uint128_t f30;
    106         uint128_t f31;
    107        
    108         uintptr_t ar_bsp;
    109         uintptr_t ar_bspstore;
    110         uintptr_t ar_bspstore_new;
    111         uint64_t ar_rnat;
    112         uint64_t ar_ifs;
    113         uint64_t ar_pfs;
    114         uint64_t ar_rsc;
    115         uintptr_t cr_ifa;
    116         cr_isr_t cr_isr;
    117         uintptr_t cr_iipa;
    118         psr_t cr_ipsr;
    119         uintptr_t cr_iip;
    120         uint64_t pr;
    121         uintptr_t sp;
    122        
    123         /*
    124          * The following variables are defined only for break_instruction
    125          * handler.
    126          */
    127         uint64_t in0;
    128         uint64_t in1;
    129         uint64_t in2;
    130         uint64_t in3;
    131         uint64_t in4;
    132         uint64_t in5;
    133         uint64_t in6;
    134 } istate_t;
    135 
    13675extern void *ivt;
    137 
    138 NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
    139     uintptr_t retaddr)
    140 {
    141         istate->cr_iip = retaddr;
    142         istate->cr_ipsr.ri = 0;    /* return to instruction slot #0 */
    143 }
    144 
    145 NO_TRACE static inline unative_t istate_get_pc(istate_t *istate)
    146 {
    147         return istate->cr_iip;
    148 }
    149 
    150 NO_TRACE static inline unative_t istate_get_fp(istate_t *istate)
    151 {
    152         /* FIXME */
    153        
    154         return 0;
    155 }
    156 
    157 NO_TRACE static inline int istate_from_uspace(istate_t *istate)
    158 {
    159         return (istate->cr_iip) < 0xe000000000000000ULL;
    160 }
    16176
    16277extern void general_exception(uint64_t, istate_t *);
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