Ignore:
Timestamp:
2013-12-25T13:05:25Z (10 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
bc54126c
Parents:
f4a47e52 (diff), 6946f23 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

merge mainline changes

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/mips32/include/arch/mm/page.h

    rf4a47e52 r0773396  
    2727 */
    2828
    29 /** @addtogroup mips32mm       
     29/** @addtogroup mips32mm
    3030 * @{
    3131 */
     
    7070 * - PTL3 has 4096 entries (12 bits)
    7171 */
    72  
     72
    7373/* Macros describing number of entries in each level. */
    74 #define PTL0_ENTRIES_ARCH       64
    75 #define PTL1_ENTRIES_ARCH       0
    76 #define PTL2_ENTRIES_ARCH       0
    77 #define PTL3_ENTRIES_ARCH       4096
     74#define PTL0_ENTRIES_ARCH  64
     75#define PTL1_ENTRIES_ARCH  0
     76#define PTL2_ENTRIES_ARCH  0
     77#define PTL3_ENTRIES_ARCH  4096
    7878
    7979/* Macros describing size of page tables in each level. */
    80 #define PTL0_SIZE_ARCH          ONE_FRAME
    81 #define PTL1_SIZE_ARCH          0
    82 #define PTL2_SIZE_ARCH          0
    83 #define PTL3_SIZE_ARCH          ONE_FRAME
     80#define PTL0_FRAMES_ARCH  1
     81#define PTL1_FRAMES_ARCH  1
     82#define PTL2_FRAMES_ARCH  1
     83#define PTL3_FRAMES_ARCH  1
    8484
    8585/* Macros calculating entry indices for each level. */
    86 #define PTL0_INDEX_ARCH(vaddr)  ((vaddr) >> 26)
    87 #define PTL1_INDEX_ARCH(vaddr)  0
    88 #define PTL2_INDEX_ARCH(vaddr)  0
    89 #define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 14) & 0xfff)
     86#define PTL0_INDEX_ARCH(vaddr)  ((vaddr) >> 26)
     87#define PTL1_INDEX_ARCH(vaddr)  0
     88#define PTL2_INDEX_ARCH(vaddr)  0
     89#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 14) & 0xfff)
    9090
    9191/* Set accessor for PTL0 address. */
    9292#define SET_PTL0_ADDRESS_ARCH(ptl0)
    9393
    94 /* Get PTE address accessors for each level. */ 
     94/* Get PTE address accessors for each level. */
    9595#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
    9696        (((pte_t *) (ptl0))[(i)].pfn << 12)
     
    196196        p->p = 1;
    197197}
    198        
    199198
    200199extern void page_arch_init(void);
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