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Changeset 06f10ac in mainline for kernel/arch/arm64/src/asm.S


Ignore:
Timestamp:
2021-08-22T19:08:44Z (2 months ago)
Author:
Martin Decky <martin@…>
Branches:
master
Children:
c21cc26
Parents:
95b7d4df
Message:

Implement support for HiKey? 960

Initial support for the 96Boards HiKey? 960 board.

  • The kernel identity mapping has been extended to 4 GiB. The initial bootstrap mapping maps 3 GiB as nornal memory and the next 1 GiB as device memory to support early UART debugging output.
  • The istate_t has been padded in order to preserve the stack pointer alignment invariant.

The current implementation is limited to UP and UART input/output.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/arm64/src/asm.S

    r95b7d4df r06f10ac  
    5959        ret
    6060FUNCTION_END(early_putuchar)
     61
     62/** Flush instruction caches
     63 *
     64 * @param x0 Starting address of the flushing.
     65 * @param x1 Number of bytes to flush.
     66 *
     67 */
     68FUNCTION_BEGIN(smc_coherence)
     69        /* Initialize loop */
     70        mov x9, x0
     71        mov x10, xzr
     72
     73        __dc_loop:
     74                /* Data or Unified Cache Line Clean */
     75                dc cvau, x9
     76                add x9, x9, #4
     77                add x10, x10, #4
     78                cmp x10, x1
     79                blo __dc_loop
     80
     81        dsb ish
     82
     83        /* Initialize loop */
     84        mov x9, x0
     85        mov x10, xzr
     86
     87        __ic_loop:
     88                /* Instruction Cache Line Invalidate */
     89                ic ivau, x9
     90                add x9, x9, #4
     91                add x10, x10, #4
     92                cmp x10, x1
     93                blo __ic_loop
     94
     95        dsb ish
     96        isb
     97        ret
     98FUNCTION_END(smc_coherence)
    6199
    62100/* Static checks for the istate_t save/load. */
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