Changeset 0206d35 in mainline for uspace/drv/bus/usb/xhci/endpoint.c


Ignore:
Timestamp:
2017-10-25T00:03:57Z (7 years ago)
Author:
Ondřej Hlavatý <aearsis@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
c3d926f
Parents:
56db65d
Message:

Moving things around to improve isolation of responsibilities

Bus interface was simplified, xHCI implementation of address_device was spread into stack of rh → bus → hc and back.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/usb/xhci/endpoint.c

    r56db65d r0206d35  
    197197static void setup_control_ep_ctx(xhci_endpoint_t *ep, xhci_ep_ctx_t *ctx)
    198198{
    199         // EP0 is configured elsewhere.
    200         assert(ep->base.target.endpoint > 0);
    201 
    202199        XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(ep));
    203200        XHCI_EP_MAX_PACKET_SIZE_SET(*ctx, ep->base.max_packet_size);
     201        XHCI_EP_MAX_BURST_SIZE_SET(*ctx, ep->max_burst);
     202        XHCI_EP_MULT_SET(*ctx, ep->mult);
    204203        XHCI_EP_ERROR_COUNT_SET(*ctx, 3);
    205204        XHCI_EP_TR_DPTR_SET(*ctx, ep->ring.dequeue);
     
    211210        XHCI_EP_TYPE_SET(*ctx, xhci_endpoint_type(ep));
    212211        XHCI_EP_MAX_PACKET_SIZE_SET(*ctx, ep->base.max_packet_size);
    213         XHCI_EP_MAX_BURST_SIZE_SET(*ctx,
    214             xhci_device_get(ep->base.device)->usb3 ? ep->max_burst : 0);
     212        XHCI_EP_MAX_BURST_SIZE_SET(*ctx, ep->max_burst);
    215213        XHCI_EP_ERROR_COUNT_SET(*ctx, 3);
    216214
     
    260258};
    261259
     260void xhci_setup_endpoint_context(xhci_endpoint_t *ep, xhci_ep_ctx_t *ep_ctx)
     261{
     262        assert(ep);
     263        assert(ep_ctx);
     264
     265        usb_transfer_type_t tt = ep->base.transfer_type;
     266        assert(tt < ARRAY_SIZE(setup_ep_ctx_helpers));
     267
     268        memset(ep_ctx, 0, sizeof(*ep_ctx));
     269        setup_ep_ctx_helpers[tt](ep, ep_ctx);
     270}
     271
    262272int xhci_device_add_endpoint(xhci_device_t *dev, xhci_endpoint_t *ep)
    263273{
     
    270280        }
    271281
    272         int err = ENOMEM;
    273282        const usb_endpoint_t ep_num = ep->base.target.endpoint;
    274283
     
    288297        }
    289298
    290         /* Set up TRB ring / PSA. */
    291         if ((err = xhci_endpoint_alloc_transfer_ds(ep))) {
    292                 goto err;
    293         }
    294 
    295299        /* Add endpoint. */
    296300        xhci_ep_ctx_t ep_ctx;
    297         memset(&ep_ctx, 0, sizeof(xhci_ep_ctx_t));
    298         setup_ep_ctx_helpers[ep->base.transfer_type](ep, &ep_ctx);
    299 
    300         if ((err = hc_add_endpoint(dev->hc, dev->slot_id, xhci_endpoint_index(ep), &ep_ctx))) {
    301                 goto err_ds;
    302         }
    303 
    304         return EOK;
    305 
    306 err_ds:
    307         xhci_endpoint_free_transfer_ds(ep);
    308 err:
    309         dev->endpoints[ep_num] = NULL;
    310         dev->active_endpoint_count--;
    311         return err;
     301        xhci_setup_endpoint_context(ep, &ep_ctx);
     302
     303        return hc_add_endpoint(dev->hc, dev->slot_id, xhci_endpoint_index(ep), &ep_ctx);
    312304}
    313305
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